Method and apparatus for keyboard control with programmable debounce and jog
A method for providing debounce and jog control for a keyboard includes loading a first electronic storage register with a value indicative of a debounce period for the keyboard and loading a second electronic storage register with a value indicative of a jog period for the keyboard. The keyboard is scanned for a pressed key, and a signal indicative of the pressed key is debounced. The method further includes providing electronic signals for key status and jog and asserting an interrupt in accordance with the indicated debounce period and the indicated jog period while the debounced signal indicates the pressed key is down. Keys of the keyboard other than the pressed key are prevented from being scanned until the debounced signal indicates that the pressed key has come up.
1. A method for providing debounce and jog control for a keyboard, said method comprising:
loading a first electronic storage register with a value indicative of a debounce period for the keyboard;
loading a second electronic storage register with a value indicative of a jog period for the keyboard;
scanning the keyboard for a pressed key;
debouncing a signal indicative of the pressed key;
providing electronic signals for key status and jog and asserting an interrupt in accordance with the indicated debounce period and the indicated jog period while the debounced signal indicates the pressed key is down; and
preventing keys of the keyboard other than the pressed key from being scanned until the debounced signal indicates that the pressed key has come up.
2. A method in accordance with claim 1 said wherein preventing keys of the keyboard other than the pressed key from being scanned comprises halting a counter to stop said scanning.
3. A method in accordance with claim 1 wherein the debounce period is half a period of a keyclock.
4. A method for providing debounce and jog control for a keyboard, said method comprising:
loading a first electronic storage register with a value indicative of a debounce period for the keyboard;
loading a second electronic storage register with a value indicative of a jog period for the keyboard;
scanning the keyboard for a pressed key;
debouncing a signal indicative of the pressed key;
providing electronic signals for key status and jog and asserting an interrupt in accordance with the indicated debounce period and the indicated jog period while the debounced signal indicates the pressed key is down;
preventing keys of the keyboard other than the pressed key from being scanned until the debounced signal indicates that the pressed key has come up; and
clocking a code for the pressed key into a register and generating an interrupt if the pressed key is active at the end of the debounce period.
5. A method in accordance with claim 4 wherein said preventing keys of the keyboard other than the pressed key from being scanned for key status, jog, and interrupts until the debounced signal indicates that the pressed key has come up further comprises halting a counter to prevent other keys from being scanned at the end of the debounce period if the pressed key is active at the end of the debounce period.
6. A method in accordance with claim 5 further comprising utilizing software to read a register containing a status of the pressed key and clearing the interrupt when the software reads the key status.
7. A method in accordance with claim 6 further comprising generating a second interrupt signal indicating that the pressed key is still down after the software reads the pressed key when the pressed key is still down after the indicated jog period.
8. A method in accordance with claim 7 further comprising utilizing a debounced key signal for the pressed key to determine whether the pressed key is still down after the indicated jog period.
9. A method in accordance with claim 7 further comprising clearing the second interrupt signal after the software reads the pressed key.
10. A method in accordance with claim 9 further comprising asserting a third interrupt when the pressed key comes up, using software to read the state of the pressed key when the third interrupt is asserted, and, after the third interrupt is asserted and the pressed key is read, subsequently clearing the third interrupt and restarting the counter to allow the keyboard to scan for another pressed key.
11. An apparatus for scanning a matrix keyboard, said apparatus comprising:
a programmable register configured to store a value indicative of a debounce time for the keyboard; and
a programmable register configured to store a value indicative of a jog time for a key of the keyboard; and
said apparatus configured to:
scan the keyboard for a pressed key;
debounce a signal indicative of the pressed key;
provide electronic signals for key status and jog and assert an interrupt in accordance with the indicated debounce period and the indicated jog period while the debounced signal indicate that the pressed key is down; and
prevent keys of the keyboard other than the pressed key from being scanned until the debounced signal indicates that the pressed key has come up.
12. An apparatus in accordance with claim 11 further comprising a counter, and to prevent keys of the keyboard other than the pressed key from being scanned, said apparatus is configured to halt the counter.
13. An apparatus in accordance with claim 11 further comprising a keyclock, and wherein said apparatus is configured with a debounce period of half a keyclock.
14. An apparatus in accordance with claim 11 further configured to debounce and jog one or more GPIO keys and to continue scanning the matrix keyboard while a said GPIO key is pressed.
15. An apparatus for scanning a matrix keyboard, said apparatus comprising:
a first programmable register configured to store a value indicative of a debounce time for the keyboard; and
a second programmable register configured to store a value indicative of a jog time for a key of the keyboard; and
said apparatus configured to:
scan the keyboard for a pressed key;
debounce a signal indicative of the pressed key;
provide electronic signals for key status and jog and assert an interrupt in accordance with the indicated debounce period and the indicated jog period while the debounced signal indicate that the pressed key is down;
prevent keys of the keyboard other than the pressed key from being scanned until the debounced signal indicates that the pressed key has come up; and
clock a code for the pressed key into a register and to generate an interrupt if the pressed key is active at the end of the debounce period.
16. An apparatus in accordance with claim 15 wherein to prevent keys of the keyboard other than the pressed key from being scanned for key status, jog, and interrupts until the debounced signal indicates that the pressed key has come up, said apparatus is further configured to halt a counter to prevent other keys from being scanned at the end of the debounce period if the pressed key is active at the end of the debounce period.
17. An apparatus in accordance with claim 16 further configured to provide clear an interrupt when a register containing a status of the pressed key is read.
18. An apparatus in accordance with claim 17 further configured to generate a second interrupt signal indicating that the pressed key is still down after the pressed key is read, when the pressed key is still down after the indicated jog period.
19. An apparatus in accordance with claim 18 further configured to utilize a debounced key signal for the pressed key to determine whether the pressed key is still down after the indicated jog period.
20. An apparatus in accordance with claim 18 further configured to clear the second interrupt signal after the pressed key is read.
21. An apparatus in accordance with claim 20 further configured to assert a third interrupt when the pressed key comes up, after the third interrupt is asserted and the pressed key is read, subsequently clearing the third interrupt and restarting the counter to allow the keyboard to scan for another pressed key.
22. An apparatus in accordance with claim 15 further configured to debounce and jog one or more GPIO keys and to continue scanning the matrix keyboard while a said GPIO key is pressed.
23. A data entry apparatus comprising:
a matrix keyboard;
a first programmable register configured to store a value indicative of a debounce time for the keyboard; and
a second programmable register configured to store a value indicative of a jog time for a key of the keyboard; and
said apparatus configured to:
scan the keyboard for a pressed key;
debounce a signal indicative of the pressed key;
provide electronic signals for key status and jog and assert an interrupt in accordance with the indicated debounce period and the indicated jog period while the debounced signal indicate that the pressed key is down; and
prevent keys of the keyboard other than the pressed key from being scanned until the debounced signal indicates that the pressed key has come up.
24. An apparatus in accordance with claim 23 further comprising a counter, and to prevent keys of the keyboard other than the pressed key from being scanned, said apparatus is configured to halt the counter.
25. An apparatus in accordance with claim 23 further comprising a keyclock, and wherein said apparatus is configured with a debounce period of half a keyclock.
26. An apparatus in accordance with claim 23 further configured to clock a code for the pressed key into a register and to generate an interrupt if the pressed key is active at the end of the debounce period.
27. An apparatus in accordance with claim 26 wherein to prevent keys of the keyboard other than the pressed key from being scanned for key status, jog, and interrupts until the debounced signal indicates that the pressed key has come up, said apparatus is further configured to halt a counter to prevent other keys from being scanned at the end of the debounce period if the pressed key is active at the end of the debounce period.
28. An apparatus in accordance with claim 27 further configured to provide clear an interrupt when a register containing a status of the pressed key is read.
29. An apparatus in accordance with claim 28 further configured to generate a second interrupt signal indicating that the pressed key is still down after the pressed key is read, when the pressed key is still down after the indicated jog period.
30. An apparatus in accordance with claim 29 further configured to utilize a debounced key signal for the pressed key to determine whether the pressed key is still down after the indicated jog period.
31. An apparatus in accordance with claim 30 further configured to clear the second interrupt signal after the pressed key is read.
32. An apparatus in accordance with claim 31 further configured to assert a third interrupt when the pressed key comes up, after the third interrupt is asserted and the pressed key is read, subsequently clearing the third interrupt and restarting the counter to allow the keyboard to scan for another pressed key.
33. An apparatus in accordance with claim 23 further comprising one or more GPIO keys, and further configured to debounce and jog said one or more GPIO keys and to continue scanning the matrix keyboard while a said GPIO key is pressed.