Video signal format detector and generator system and method

1. A video processing circuit for generating clock and timing signals from an incoming video signal, comprising;

a timing reference circuit for generating a reference clock signal;

a video format detector coupled to the reference clock signal and to synchronization data derived from the incoming video signal for generating a format signal indicating the format of the incoming video signal; and

a clock and timing generator circuit coupled to the format signal and the reference clock signal for generating clock and timing signals that emulate the incoming video signal;

wherein the video format detector comprises:

a video timing measurement circuit for receiving the synchronization data and the reference clock signal and for measuring one or more parameters of the synchronization data; and

a video format lookup table storing video parameters regarding a plurality of video formats, each of the plurality of video formats being associated with one or more stored video parameters;

wherein the video processing circuit compares the measured parameters from the video tinting measurement circuit with the stored video parameters in the video format lookup table in order to generate the format signal.

2. The video processing circuit of claim 1 , wherein the video timing measurement circuit comprises at least one counter.

3. The video processing circuit of claim 2 , wherein the counter measures the periodicity of the synchronization data.

4. The video processing circuit of claim 3 , wherein the counter measures the periodicity of horizontal synchronization data.

5. The video processing circuit of claim 3 , wherein the counter measures the periodicity of vertical synchronization data.

6. The video processing circuit of claim 1 , wherein the synchronization data includes both horizontal and vertical synchronization data, and wherein the video timing measurement circuit includes at least two measurement circuits, a first measurement circuit for determining a first characteristic of the horizontal synchronization data and a second measurement circuit for determining a second characteristic of the vertical synchronization data.

7. The video processing circuit of claim 6 , wherein the video timing measurement circuit includes two additional measurement circuits, a third circuit for determining a third characteristic of the horizontal synchronization data and a fourth circuit for determining a fourth characteristic of the vertical synchronization data.

8. The video processing circuit of claim 7 , wherein the first, second, third and fourth measurement circuits are counters.

9. The video processing circuit of claim 1 , wherein the video format lookup table associates one or more tolerance levels with at least some of the stored video parameters.

10. The video processing circuit of claim 9 , wherein the one or more tolerance levels are applied to the stored video parameters when comparing the measured parameters to the data stored in the video format lookup table.

11. The video processing circuit of claim 10 , wherein the format signal indicates an unrecognized format if the measured parameters from the video timing measurement circuit do not match up to the stored video parameters in the video format lookup table.

12. A video processing circuit for generating clock and timing signals from an incoming video signal, comprising:

a timing reference circuit for generating a reference clock signal;

a video format detector coupled to the reference clock signal and to synchronization data derived from the incoming video signal for generating a format signal indicating the format of the incoming video signal; and

a clock and timing generator circuit coupled to the format signal and the reference clock signal for generating clock and timing signals that emulate the incoming video signal;

wherein the clock and timing generator circuit comprises:

a frequency and timing parameter table indexed by the format signal for generating frequency and timing parameters associated with the format indicated by the format signal;

a clock generator for receiving the frequency parameter from the frequency and timing parameter table and for generating the clock signal emulating the incoming video signal; and

a timing generator for receiving the timing parameter from the frequency and timing parameter table and for generating the timing signal emulating the incoming video signal.

13. The video processing circuit of claim 12 , wherein the frequency and timing parameter table generates a plurality of timing parameters for each format, and wherein the timing generator receives the plurality of timing parameters and generates a plurality of timing signals emulating the incoming video signal.

14. A video processing method for generating clock and timing signals from an incoming video signal, comprising:

generating a reference clock signal;

deriving synchronization data from the incoming video signal;

generating a format signal indicating the format of the incoming video signal based on the reference clock signals and the synchronization data by:

storing video parameters regarding a plurality of video formats associated with one or more of the stored video parameters;

measuring one or more parameters of the synchronization data; and

comparing the one or more measured parameters of the synchronization data to one or more stored video parameters to generate the format signal; and

generating clock and timing signals that emulate the incoming video signal based on the format signal and the reference clock signal.

15. The method of claim 14 , further comprising:

associating a tolerance level with at least some of the stored video parameters; and

indicating an unrecognized video format in the video format signal if the one or more measured parameters do not match up with the one or more stored video parameters.

16. A video processing method for generating clock and timing signals from an incoming video signal, comprising:

generating a reference clock signal;

deriving synchronization data from the incoming video signal;

generating a format signal indicating the format of the incoming video signal based on the reference clock signals and the synchronization data; and

generating clock and timing signals that emulate the incoming video signal based on the format signal and the reference clock signal by:

indexing a frequency and timing parameter table by the format signal to generate frequency and timing parameters associated with the format indicated by the format signal;

generating the clock signals that emulate the incoming video signal based on the indexed frequency parameter; and

generating the timing signals that emulate the incoming video signal based on the indexed timing parameter.

17. A video processing apparatus for generating clock and timing signals from an incoming video signal, comprising:

means for generating a reference clock signal;

means for deriving synchronization data from the incoming video signal;

means for storing video parameters regarding a plurality of video formats associated with one or more of the stored video parameters;

means for measuring one or more parameters of the synchronization data;

means for comparing the one or more measured parameters of the synchronization data to one or more stored video parameters to generate the format signal; and

means for generating clock and timing signals that emulate the incoming video signal based on the format signal and the reference clock signal.

18. A video processing apparatus for generating clock and timing signals from an incoming video signal, comprising:

means for generating a reference clock signal;

means for deriving synchronization data from the incoming video signal;

means for generating a format signal indicating the format of the incoming video signal based on the reference clock signals and the synchronization data;

means for generating frequency and timing parameters associated with the format indicated by the format signal;

means for generating the clock signals that emulate die incoming video signal bused on the indexed frequency parameter; and

means for generating the timing signals that emulate the incoming video signal based on the indexed timing parameter.