Voltage controlled oscillator and PLL circuit

1. A voltage controlled oscillator comprising:

a voltage comparing circuit that receives a control voltage, a first reference voltage, and a second reference voltage to activate a first voltage comparison signal when the control voltage is lower than the first reference voltage and to activate a second voltage comparison signal when the control voltage is higher than the second reference voltage, the second reference voltage being higher than the first reference voltage;

a counter that decrements a counter value while the first voltage comparison signal is activated and increments the counter value while the second voltage comparison signal is activated, in synchronization with a count clock; and

an oscillating circuit that has a plurality of oscillation frequency bands different from one another, selects one of the oscillation frequency bands according to the counter value, and regulates an oscillation frequency according to the control voltage within the selected oscillation frequency band to output an output clock;

wherein said oscillating circuit comprises:

a plurality of internal oscillating circuits having oscillation frequency bands different from one another; and a selecting circuit that selects, according to the counter value, one of clocks generated by said internal oscillating circuits to output the selected clock as the output clock; and

each of said internal oscillating circuits comprises: a plurality of inverting circuits connected in a ring; and a plurality of variable resistors provided between a power supply line and power supply terminals of said inverting circuits to be connected with the power supply line and the power supply terminals, respectively, and changing a resistance value according to the control voltage.

2. The voltage controlled oscillator according to claim 1 , wherein

in response to a reset signal, said counter is initialized to such a counter value as to designate an internal oscillating circuit having an oscillation frequency band including a target frequency of the output clock.

3. A voltage controlled oscillator comprising:

a voltage comparing circuit that receives a control voltage, a first reference voltage, and a second reference voltage to activate a first voltage comparison signal when the control voltage is lower than the first reference voltage and to activate a second voltage comparison signal when the control voltage is higher than the second reference voltage, the second reference voltage being higher than the first reference voltage;

a counter that decrements a counter value while the first voltage comparison signal is activated and increments the counter value while the second voltage comparison signal is activated, in synchronization with a count clock; and

an oscillating circuit that has a plurality of oscillation frequency bands different from one another, selects one of the oscillation frequency bands according to the counter value, and regulates an oscillation frequency according to the control voltage within the selected oscillation frequency band to output an output clock;

wherein said oscillating circuit comprises:

a plurality of inverting circuits connected in series;

a plurality of variable resistors provided between a power supply line and power supply terminals of said inverting circuits to be connected with the power supply line and the power supply terminals, respectively, and changing a resistance value according to the control voltage; and

a switching circuit that connects one of outputs of odd-numbered inverting circuits to an input of an initial inverting circuit according to the counter value in order to output, as the output clock, a signal to be supplied to the input of the initial inverting circuit.

4. The voltage controlled oscillator according to claim 3 , wherein

in response to a reset signal, said counter is initialized to such a counter value as to designate an output of an inverting circuit which corresponds to the oscillation frequency band including a target frequency of the output clock.

5. A voltage controlled oscillator comprising:

a voltage comparing circuit that receives a control voltage, a first reference voltage, and a second reference voltage to activate a first voltage comparison signal when the control voltage is lower than the first reference voltage and to activate a second voltage comparison signal when the control voltage is higher than the second reference voltage, the second reference voltage being higher than the first reference voltage;

a counter that decrements a counter value while the first voltage comparison signal is activated and increments the counter value while the second voltage comparison signal is activated, in synchronization with a count clock; and

an oscillating circuit that has a plurality of oscillation frequency bands different from one another, selects one of the oscillation frequency bands according to the counter value, and regulates an oscillation frequency according to the control voltage within the selected oscillation frequency band to output an output clock;

wherein said oscillating circuit comprises:

a plurality of inverting circuits connected in a ring;

a plurality of switching circuits each having a plurality of switches connected in parallel between a power supply line and respective power supply terminals of said inverting circuits, a number of switches in an ON state in each of the switching circuits changing according to the counter value; and

a plurality of variable resistors connected in series to said switching circuits respectively between the power supply line and the power supply terminals of said inverting circuits and changing a resistance value according to the control voltage.

6. The voltage controlled oscillator according to claim 5 , wherein

in response to a reset signal, said counter is initialized to such a counter value as to indicate the number of switches in the ON state which corresponds to the oscillation frequency band including a target frequency of the output clock.

7. A PLL circuit comprising:

a phase comparator comparing phases of a reference clock and of an output clock generated according to the reference clock;

a voltage regulating circuit regulating an output voltage according to a result of the phase comparison by said phase comparator; and

a voltage controlled oscillator receiving the output voltage as a control voltage to change a frequency of the output clock according to the control voltage, wherein said voltage controlled oscillator comprises:

a voltage comparing circuit receiving the control voltage, a first reference voltage, and a second reference voltage to activate a first voltage comparison signal when the control voltage is lower than the first reference voltage and to activate a second voltage comparison signal when the control voltage is higher than the second reference voltage, the second reference voltage being higher than the first reference voltage;

a counter that decrements a counter value while the first voltage comparison signal is activated and increments the counter value while the second voltage comparison signal is activated, in synchronization with a count clock; and

an oscillating circuit that has a plurality of oscillation frequency bands different from one another, selects one of the oscillation frequency bands according to the counter value, and regulates an oscillation frequency according to the control voltage within the selected oscillation frequency band to output the output clock;

wherein said count clock is the output clock; and

wherein said counter updates the counter value in synchronization with an inverse transition edge of a transition edge of the output clock which is used as a timing for the phase comparison by said phase comparator.

8. The PLL circuit according to claim 7 , further comprising

a divider provided between said voltage controlled oscillator and said phase comparator to frequency-divide the output clock to output a divided clock to said phase comparator as the output clock.