IP Library Granted Patent US 7,238,592
Granted Patent B2
US 7,238,592 · App. 10/942,828 · Granted Jul 3, 2007

Method of manufacturing a semiconductor device having an alignment mark

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Quick Facts
Patent No.
US 7,238,592
App. No.
10/942,828
Granted
Jul 3, 2007
Kind
B2
Abstract

A method of manufacturing a semiconductor device includes providing a substrate and forming a projecting alignment mark. The substrate includes an insulating layer and a semiconductor layer on the insulating layer, and the substrate includes device areas and a scribe line area which surrounds the device area in the semiconductor layer. The projecting alignment mark is formed on the scribe line area.

Claims (25)

1. A method manufacturing a semiconductor device comprising:

providing a substrate which has an insulating layer and a semiconductor layer on the insulating layer, wherein the substrate has a device area and a scribe line area which surrounds the device area in the semiconductor layer; and

forming a projecting alignment mark on the scribe line area, said forming a projection alignment mark comprising

forming a silicon dioxide layer on the semiconductor layer,

removing a portion of the silicon dioxide layer to form a window that exposes the semiconductor layer at the scribe line area,

forming an alignment mark layer in the window, and

patterning the alignment mark layer into a frame-shaped portion, wherein the alignment mark layer is made by an epitaxial growth method.

2. The method of claim 1 , wherein the alignment mark layer is made of silicon.

3. The method of claim 1 , wherein the alignment mark layer is made of poly crystalline silicon.

4. The method of claim 1 , further comprising oxidizing the semiconductor layer which is adjacent to the projecting alignment mark.

5. The method of claim 4 , wherein said oxidizing the semiconductor layer forms an isolating layer.

6. A method manufacturing a semiconductor device comprising:

providing a substrate which has an insulating layer and a semiconductor layer on the insulating layer, wherein the substrate has a device area and a scribe line area which surrounds the device area in the semiconductor layer; and

forming a projecting alignment mark on the scribe line area, said forming a projecting alignment mark comprising

forming a silicon dioxide layer on the semiconductor layer,

removing a portion of the silicon dioxide layer to form a window that exposes the semiconductor layer at the scribe line area,

forming an alignment mark layer in the window by an epitaxial growth method,

patterning the alignment mark layer into a frame-shaped portion,

forming a second silicon dioxide layer on the alignment mark,

forming a silicon nitride layer on the second silicon dioxide layer,

removing portions of the silicon nitride layer within the scribe line area adjacent the frame-shaped portion and within peripheral areas of the device area to form openings, and

oxidizing portions of semiconductor layer through the openings.

7. The method of claim 6 , wherein the alignment mark layer is made of silicon.

8. The method of claim 6 , wherein the alignment mark layer is made of poly crystalline silicon.

9. The method of claim 6 , wherein said oxidizing the semiconductor layer forms an isolating layer.

Assignments (3)
CHANGE OF NAME Recorded Mar 21, 2014
From: OKI SEMICONDUCTOR CO., LTD
To: LAPIS SEMICONDUCTOR CO., LTD.
Reel/Frame 032495/0483 →
CHANGE OF NAME Recorded Dec 24, 2008
From: OKI ELECTRIC INDUSTRY CO., LTD.
To: OKI SEMICONDUCTOR CO., LTD.
Reel/Frame 022052/0797 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2004
From: DOUMAE, YASUHIRO
To: OKI ELECTRIC INDUSTRY CO., LTD.
Reel/Frame 015821/0713 →