Thin film transistor liquid crystal display and fabrication method thereof
View Patent ↗A thin film transistor liquid crystal display (TFT-LCD) and fabrication method thereof. The fabrication method includes depositing a first metal layer on a transparent substrate, patterning the first metal layer to form at least two adjacent gate electrodes, forming a gate insulating layer on the gate electrodes, forming a semiconductor layer on the insulating layer, patterning the semiconductor layer into a predetermined shape, depositing a second metal layer on the transparent substrate, patterning the second metal layer to form a source/drain electrode layer, and depositing an insulating layer on the transparent substrate. A contact hole is defined via the insulating layer, source/drain electrode layer, and gate insulating layer, exposing a part of the surface of transparent substrate between the adjacent gate electrodes. A transparent conductive layer is deposited on the transparent substrate, and a light-shielding matrix is formed directly above the contact hole.
1. A method of fabricating a thin film transistor-LCD, comprising:
depositing a first metal layer on a transparent substrate;
patterning the first metal layer to form at least two adjacent gate electrodes;
forming a gate insulating layer on the gate electrodes;
forming a semiconductor layer on the insulating layer;
patterning the semiconductor layer into a predetermined shape;
depositing a second metal layer on the transparent substrate;
patterning the second metal layer to form a source/drain electrode layer;
depositing an insulating layer on the transparent substrate;
defining a contact hole via the insulating layer, source/drain electrode layer, and gate insulating layer, exposing a part of the surface of transparent substrate between the adjacent gate electrodes;
depositing a transparent conductive layer on the transparent substrate; and
forming a light-shielding matrix directly above the contact hole.
2. The method as claimed in claim 1 , wherein the gate electrode is a Mo—Al—Nd electrode.
3. The method as claimed in claim 1 , wherein the source/drain electrode layer is an Al, Al—Nb, Al—Nd, Al—Ti or Al—Si—Cu layer.
4. The method as claimed in claim 1 , wherein the gate insulating layer is an oxide layer formed by chemical vapor deposition.
5. The method as claimed in claim 1 , wherein the insulating layer is an oxide or nitride layer formed by chemical vapor deposition.
6. The method as claimed in claim 1 , further comprising a step of providing a color filter a predetermined distance above the transparent substrate, wherein the light-shielding matrix directly above the contact hole is disposed on the color filter.
7. The method as claimed in claim 1 , wherein the gate electrodes are separated from the contact hole.
8. A method of fabricating a thin film transistor-LCD, comprising:
depositing a first metal layer on a transparent substrate;
patterning the first metal layer to form at least two adjacent gate electrodes by photolithography;
forming a gate insulating layer on the gate electrodes;
forming a semiconductor layer on the insulating layer;
patterning the semiconductor layer into a predetermined shape by photolithography;
depositing a second metal layer on the transparent substrate;
patterning the second metal layer to form a source/drain electrode layer by photolithography;
depositing an insulating layer on the transparent substrate;
defining a contact hole by photolithography, separated from the gate electrodes, via the insulating layer, source/drain electrode layer, and gate insulating layer, exposing a part of the surface of transparent substrate between the adjacent gate electrodes;
depositing an indium tin oxide layer on the transparent substrate;
providing a color filter a predetermined distance above the transparent substrate, having a light-shielding matrix directly above the contact hole.
9. The method as claimed in claim 8 , wherein the gate electrode is a Mo—Al—Nd electrode; the source/drain electrode layer is an Al, Al—Nb, Al—Nd, Al—Ti or Al—Si—Cu layer.
10. The method as claimed in claim 8 , wherein the gate insulating layer is an oxide layer and the insulating layer is an oxide or nitride layer formed by chemical vapor deposition.