IP Library Granted Patent US 7,247,925
Granted Patent B2
US 7,247,925 · App. 10/948,264 · Granted Jul 24, 2007

Semiconductor device and method for fabricating the same

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Quick Facts
Patent No.
US 7,247,925
App. No.
10/948,264
Granted
Jul 24, 2007
Kind
B2
Abstract

A semiconductor device includes a semiconductor substrate of a first conductive type, a collector layer formed on the semiconductor substrate and made of a first semiconductor being of the first conductive type and having a higher resistance than that of the semiconductor substrate, an intrinsic base region having a junction surface with the collector layer and made of a second semiconductor of a second conductive type, and an emitter region having a junction surface with the intrinsic base region and made of a third semiconductor of the first conductive type. A periphery of the intrinsic base region is surrounded by an insulating region extending from the collector layer to the semiconductor substrate.

Claims (8)

1. A semiconductor device, comprising:

a semiconductor substrate of a first conductive type;

a collector layer formed on the semiconductor substrate and made of a first semiconductor being of the first conductive type and having a higher resistance than that of the semiconductor substrate;

an intrinsic base region having a junction surface with the collector layer, made of a second semiconductor of a second conductive type, divided into a plurality of regions and formed on the collector layer by epitaxial growth;

a plurality of emitter regions each having a junction surface with an associated one of the regions into which the intrinsic base region is divided and made of a third semiconductor of the first conductive type;

a first insulating region dividing only an upper portion of the collector layer into a plurality of regions so as to correspond to each said emitter region;

a second insulating region formed on the first insulating region and determining the position of each of the regions into which the intrinsic base region is divided; and

a third insulating region formed in an outer periphery of the collector layer so as to pass through the first insulating region and extending from the collector layer to the semiconductor substrate.