Semiconductor device
View Patent ↗To attain reduction in size of a semiconductor device having a power transistor and an SBD, a semiconductor device according to the present invention comprises a first region and a second region formed on a main surface of a semiconductor substrate; plural first conductors and plural second conductors formed in the first and second regions respectively; a first semiconductor region and a second semiconductor region formed between adjacent first conductors in the first region, the second semiconductor region lying in the first semiconductor region and having a conductivity type opposite to that of the first semiconductor region; a third semiconductor region formed between adjacent second conductors in the second region, the third semiconductor region having the same conductivity type as that of the second semiconductor region and being lower in density than the second semiconductor region; a metal formed on the semiconductor substrate in the second region, the third semiconductor region having a metal contact region for contact with the metal, the metal being electrically connected to the second semiconductor region, and a center-to-center distance between adjacent first conductors in the first region being smaller than that between adjacent second conductors in the second region.
1. A semiconductor device having a first MISFET forming region, a second MISFET forming region and a Schottky barrier diode forming region on a main surface of a semiconductor substrate, comprising:
first MISFETs formed in the first MISFET forming region;
second MISFETs formed in the second MISFET forming region; and
a Schottky barrier diode formed in the Schottky barrier diode forming region,
wherein the Schottky barrier diode forming region is located between the first and second MISFET forming regions;
first source regions of the first MISFETs and second source regions of the second MISFETs are electrically connected;
first gate electrodes of the first MISFETs and second gate electrodes of the second MISFETs are electrically connected;
first drain regions of the first MISFETs and second drain regions of the second MISFETs are electrically connected;
an anode region of the Schottky barrier diode is electrically connected with the first and second source regions;
a cathode region of the Schottky barrier diode is electrically connected with the first and second drain regions; and
the semiconductor substrate has no other Schottky barrier diode forming region.
2. A semiconductor device according to claim 1 , wherein the semiconductor substrate has no other MISFET forming region.
3. A semiconductor device according to claim 1 , wherein the first and second gate electrodes are formed in trenches formed in the, main surface of the semiconductor substrate.
4. A semiconductor device according to claim 3 , wherein the trenches extend in parallel on the main surface of the semiconductor substrate.
5. A semiconductor device according to claim 1 , wherein a drain electrode is formed on a back surface of the semiconductor substrate.