Growth of III-nitride light emitting devices on textured substrates
View Patent ↗A III-nitride light emitting device is grown on a textured substrate, in order to reduce the amount of total internal reflection at the interface between the substrate and the III-nitride layers. In some embodiments, the device includes a first growth region substantially free of voids, and a second growth region that improves the material quality such that high quality layers can be grown over the first and second regions.
1. A structure comprising:
a textured substrate, wherein:
a textured surface of the substrate is a non-III-nitride surface;
the texture on the substrate comprises a pattern of repeating features;
the features have a length of at least 1 micron; and
the features have a height between 0.1 micron and 1 micron;
a first III-nitride region formed directly on the textured surface of the substrate, the first III-nitride region being substantially free of voids and having a defect density greater than 10 9 cm −2 ;
a second III-nitride region disposed on the first III-nitride region, the second III-nitride region having an average defect density less than the first III-nitride region; and
a light emitting region disposed between an n-type region and a p-type region, the light emitting region overlying the second III-nitride region;
wherein the first III-nitride region comprising: a defect reduction layer and a coalescence layer; and
wherein a surface of the coalescence layer is smoother than a surface of the defect reduction layer.
2. The structure of claim 1 wherein the first III-nitride region has a thickness between 0.5 micron and 10 microns.
3. The structure of claim 1
the defect reduction layer of the first III-nitride region having a thickness between 0.1 micron and 15 microns; and
the coalescence layer of the first III-nitride region having thickness between 0.4 micron and 20 microns.
4. The structure of claim 3 wherein:
the defect reduction layer has a thickness between 0.5 micron and 1 micron; and
the coalescence layer has a thickness between 0.5 micron and 1.5 microns.
5. The structure of claim 1 wherein the second III-nitride region comprises a silicon-dosed region.
6. The structure of claim 5 wherein the silicon-dosed region comprises:
a GaN layer having a thickness between 0.1 micron and 1 micron; and
a silicon layer having a thickness between 0.1 monolayers and 3 monolayers.
7. The structure of claim 1 wherein the second III-nitride region comprises:
a defect reduction layer having a thickness between 0.1 micron and 15 microns; and
a coalescence layer having a thickness between 0.4 micron and 20 microns;
wherein a surface of the coalescence layer is smoother than a surface of the defect reduction layer.
8. The structure of claim 7 wherein:
the defect reduction layer has a thickness between 0.5 micron and 1 micron; and
the coalescence layer has a thickness between 0.5 micron and 1.5 microns.
9. The structure of claim 1 further comprising:
an n-contact electrically connected to the n-type region; and
a p-contact electrically connected to the p-type region.
10. The structure of claim 9 further comprising:
leads electrically connected to the n- and p-contacts; and
a cover disposed over the light emitting region.
11. The structure of claim 1 wherein the pattern has a cross section comprising a peak and a valley.
12. The structure of claim 1 wherein the features are spaced at least 1 micron apart.
13. A structure comprising:
a textured substrate, wherein:
a textured surface of the substrate is a non-III-nitride surface;
the texture on the substrate comprises a pattern of repeating features;
the features have a length of at least 1 micron; and
the features have a height between 0.1 micron and 1 micron;
a first III-nitride region formed directly on the textured surface of the substrate, the first III-nitride region being substantially free of voids and having a defect density greater than 10 9 cm −2 , the first III-nitride region comprising a first portion adjacent to the substrate and a second portion, wherein the second portion has an RMS roughness less than an RMS roughness of the first portion;
a second III-nitride region disposed on the first III-nitride region, the second III-nitride region comprising a first portion adjacent to the first III-nitride region and a second portion, wherein the second portion has an RMS roughness less than an RMS roughness of the first portion; and
a light emitting region disposed between an n-type region and a p-type region, the light emitting region overlying the second III-nitride region;
wherein the first portion of the first III-nitride region comprises: a defect reduction layer and the second portion of the first III-nitride region comprises: a coalescence layer.
14. The structure of claim 13 wherein:
the first portion of the first III-nitride region has an RMS roughness between 50 nm and 175 nm; and the second portion of the first III-nitride region has an RMS roughness less than 20 nm.
15. The structure of claim 13 wherein:
the first portion of the second III-nitride region has an RMS roughness between 50 nm and 175 nm; and the second portion of the second III-nitride region has an RMS roughness less than 20 nm.
16. The structure of claim 13 wherein the first portion of the second III-nitride region comprises a silicon-dosed region.
17. The structure of claim 16 wherein the silicon-dosed region comprises:
a GaN layer having a thickness between 0.1 micron and 1 micron; and
a silicon layer having a thickness between 0.1 monolayers and 3 monolayers.
18. The structure of claim 13 wherein:
the first portion of the first region comprises a defect reduction layer having a thickness between 0.1 micron and 15 microns; and
the second portion of the first region comprises a coalescence layer having a thickness between 0.4 micron and 20 microns;
wherein a surface of the coalescence layer is smoother than a surface of the defect reduction layer.
19. The structure of claim 18 wherein:
the defect reduction layer has a thickness between 0.5 micron and 1 micron; and
the coalescence layer has a thickness between 0.5 micron and 1.5 microns.
20. The structure of claim 13 further comprising:
an n-contact electrically connected to the n-type region;
a p-contact electrically connected to the p-type region.
21. The structure of claim 20 further comprising:
leads electrically connected to the n- and p-contacts; and
a cover disposed over the light emitting region.
22. The structure of claim 1 wherein the substrate is a non-III-nitride material.
23. The structure of claim 1 wherein the substrate is one of sapphire and SiC.
24. The structure of claim 13 wherein the substrate is a non-III-nitride material.
25. The structure of claim 13 wherein the substrate is one of sapphire and SiC.