IP Library Granted Patent US 7,498,666
Granted Patent B2
US 7,498,666 · App. 10/950,966 · Granted Mar 3, 2009

Stacked integrated circuit

Assignee: Nokia Corporation
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Quick Facts
Patent No.
US 7,498,666
App. No.
10/950,966
Granted
Mar 3, 2009
Kind
B2
Abstract

The invention relates to an integrated circuit comprising a top package with a first substrate carrying an integrated circuit, and a bottom package with a second substrate carrying at least one die. To increase the clearance between the top package and the bottom package, the invention provides a cavity within the lower surface of the top package substrate such that at least parts of the die are placed within the cavity when the top package and the bottom package are assembled into a package stack.

Claims (25)

1. An integrated circuit comprising

a top package with a first substrate for carrying an integrated circuit, and

a bottom package with a second substrate for carrying at least one die, wherein the top package is configured to provide a cavity within the lower surface of the first substrate such that at least parts of the at least one die are placed within the cavity when the top package and the bottom package are assembled into a package stack, and wherein the first and second substrates are each comprised of a solid material having no openings extending therethrough.

2. The integrated circuit of claim 1 , configured to provide a mold cap encapsulating the at least one die within the bottom package and placing at least parts of the mold cap within the cavity.

3. The integrated circuit of claim 1 , configured to provide the cavity within a solder mask of the bottom surface of the top package substrate.

4. The integrated circuit of claim 1 , configured to provide the cavity within the substrate material of the top package substrate.

5. The integrated circuit of claim 1 , configured to provide at least one die and one mold cap encapsulating the die on the upper surface of the top substrate.

6. The integrated circuit of claim 1 , configured to connect the top package with the bottom package through connection elements arranged between the first substrate and the second substrate.

7. The integrated circuit of claim 1 , configured to provide solder balls as connection elements.

8. The integrated circuit of claim 1 , configured to provide dummy joints between the first and the second substrate providing increased connection reliability.

9. A module comprising:

an integrated circuit comprising

a top package with a first substrate for carrying an integrated circuit, and

a bottom package with a second substrate for carrying at least one die,

wherein the top package is configured to provide a cavity within the lower surface of the first substrate such that at least parts of the at least one die are placed within the cavity when the top package and the bottom package are assembled into a package stack, and wherein the first and second substrates are each comprised of a solid material having no openings extending therethrough.

10. An electronic device comprising:

an integrated circuit comprising

a top package with a first substrate for carrying an integrated circuit, and

a bottom package with a second substrate for carrying at least one die,

wherein the top package is configured to provide a cavity within the lower surface of the first substrate such that at least parts of the at least one die are placed within the cavity when the top package and the bottom package are assembled into a package stack, and wherein the first and second substrates are each comprised of a solid material having no openings extending therethrough.

11. An integrated circuit comprising

a top package having means for carrying an integrated circuit, and

a bottom package having means for carrying at least one die,

wherein the top package is configured to provide a cavity within the lower surface of the means for carrying an integrated circuit such that at least parts of the at least one die are placed within the cavity when the top package and the bottom package are assembled into a package stack, and wherein the means for carrying an integrated circuit and means for carrying at least one die are each comprised of a solid material having no openings extending therethrough.

12. The integrated circuit of claim 11 , configured to provide a mold cap encapsulating the at least one die within the bottom package and placing at least parts of the mold cap within the cavity.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2013
From: NOKIA CORPORATION
To: NOKIA INC.
Reel/Frame 030189/0381 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2013
From: NOKIA INC.
To: MEMORY TECHNOLOGIES LLC
Reel/Frame 030190/0043 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2004
From: HUSSA, ESA
To: NOKIA CORPORATION
Reel/Frame 015433/0481 →
Continuity (1)
Related Publication 20070228542A1 · Oct 4, 2007