IP Library Granted Patent US 7,164,326
Granted Patent B2
US 7,164,326 · App. 10/956,114 · Granted Jan 16, 2007

Oscillator circuit

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Quick Facts
Patent No.
US 7,164,326
App. No.
10/956,114
Granted
Jan 16, 2007
Kind
B2
Abstract

The oscillator circuit comprises an oscillator including an oscillating transistor through which an oscillating current flows; a first mirror transistor where the source/drain of which is grounded and the drain/source of which is connected to the oscillating transistor in series; a first reference transistor where the source/drain of which is grounded and the drain/source and the gate of which are connected in common to the gate of the first mirror transistor; a second mirror transistor where the source of which is connected to a power line and the drain/source of which is connected to the drain/source of the first reference transistor; and a second reference transistor where the source/drain of which is connected to the power line, the drain/source and the gate of which are connected in common to the gate of the second mirror transistor and the drain/source of which is connected to an external terminal to which an external resistor is connected. The oscillating current is adjusted by adjusting a current flow through the external resistor and the second reference transistor.

Claims (38)

1. An oscillator circuit comprising:

an oscillator including an oscillating transistor through which an oscillating current flows; and

a current mirror circuit via which said oscillating current is adjusted by a resistance consisting of an external resistor to adjust an oscillating frequency of said oscillator,

wherein said current mirror circuit comprises:

a first reference transistor through which a current adjusted by said external resistor flows;

a first mirror transistor connected to said oscillating transistor in series such that an output signal from said oscillating transistor is fed back to said oscillator therethrough; wherein the gate of said first reference transistor and the gate of said first mirror transistor are connected with each other; and

a second current mirror circuit including a second reference transistor, a parasitic element connected to said second reference transistor in series, and a second mirror transistor,

wherein said second mirror transistor is connected to said first reference transistor in series.

2. An oscillator circuit comprising:

an oscillator including an oscillating transistor through which an oscillating current flows; and

a current mirror circuit via which said oscillating current is adjusted by a resistance consisting of an external resistor to adjust an oscillating frequency of said oscillator,

wherein said current mirror circuit includes:

a first reference transistor through which a current adjusted by said external resistor flows;

a parasitic element connected to said first reference transistor in series; and

a first mirror transistor connected to said oscillating transistor in series such that an output signal from said oscillating transistor is fed back to said oscillator therethrough; wherein the gate of said first reference transistor and the gate of said first mirror transistor are connected with each other.

3. The oscillator circuit as set forth in claim 1 , wherein said current mirror circuit includes:

a first reference transistor where the source/drain of which is grounded and the drain/source and the gate of which are connected in common to said gate of said first mirror transistor; and

a first mirror transistor where the source/drain of which is grounded and the drain/source of which is connected to said oscillating transistor in series such that an output signal from said oscillating transistor is fed back to said oscillator therethrough.

4. An oscillator circuit comprising:

an oscillator including an oscillating transistor through which an oscillating current flows;

a first mirror transistor where the source/drain of which is grounded and the drain/source of which is connected to said oscillating transistor in series;

a first reference transistor where the source/drain of which is grounded and the drain/source and the gate of which are connected in common to said gate of said first mirror transistor;

a second mirror transistor where the source of which is connected to a power line and the drain/source of which is connected to said drain/source of said first reference transistor; and

a second reference transistor where the source/drain of which is connected to said power line, the drain/source and the gate of which are connected in common to said gate of said second mirror transistor and the drain/source of which is connected in series to a parasitic element which is connected to an external terminal to which a resistance consisting of an external resistor is connected;

wherein said oscillating current is adjusted by adjusting a current flow through said external resistor and said second reference transistor.

5. An oscillating circuit comprising:

an oscillator comprising:

an operational amplifier having a first input terminal to which a reference voltage is input and a second input terminal, and

an oscillating transistor which oscillates an oscillating current, wherein an output from said operational amplifier is input to the gate of said oscillating transistor and an output form the source/drain of said oscillating transistor is input to said second terminal of said operational amplifier; and

a first current mirror circuit comprising:

a first reference transistor through which a first current adjusted by the resistance value of an external resistor flows, and

a first mirror transistor through which a second current adjusted by said first current flows, said first mirror transistor being connected to said source/drain of said oscillating transistor in series between a power line and a ground line,

wherein the oscillating frequency of said oscillator is adjusted by having said first mirror transistor function as a resistance to adjust said oscillating current by flowing said second current to said first mirror transistor.

6. The oscillator circuit as set forth in claim 5 further comprising a second current mirror circuit, said second current mirror circuit comprising:

a second reference transistor through which a third current flows and connected to said external resistor in series between a power line and a ground line, said first current being adjusted by said third current/ and

a second mirror transistor, said second mirror transistor being connected to said first reference transistor in series between a power line and a ground line.

7. The oscillator circuit as set forth in claim 6 further comprising a parasitic element connected to said second reference transistor in series.

8. The oscillator circuit as set forth in claim 5 further comprising a parasitic element connected to said second reference transistor in series.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2006
From: NEC COMPOUND SEMICONDUCTOR DEVICES, LTD.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 017407/0502 →
CORRECT ASSIGNEE'S ADDRESS ON ASSIGNMENT DOCUMENT PREVIOUSLY RECORDED AT REEL 015879, FRAME 0397. Recorded May 31, 2005
From: SAKAGUCHI, MAKOTO
To: NEC COMPOUND SEMICONDUCTOR DEVICES, LTD.
Reel/Frame 016289/0833 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 4, 2004
From: SAKAGUCHI, MAKOTO
To: NEC COMPOUND SEMICONDUCTOR DEVICES, LTD.
Reel/Frame 015879/0397 →