IP Library Patent Application 10960016
Patent Application
App. No. 10/960,016

Semiconductor integrated circuit device

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Quick Facts
Patent No.
US None
App. No.
10/960,016
Abstract

The present invention provides a semiconductor integrated circuit device equipped with a negative feedback amplifier circuit or a step-down circuit which realizes stabilization of an output voltage effectively in response to a variation in power supply voltage. A constant current source is used to cause a bias current for setting current consumption to flow in a differential amplifying MOSFET. A capacitor is provided between an external power supply voltage and a predetermined circuit node to thereby detect a reduction in the external power supply voltage. An operating current of the differential amplifying MOSFET is increased through the use of a current flowing in the capacitor due to such an external power variation, thereby executing the operation of stabilizing an output voltage corresponding to the reduction in the external power supply voltage.

Claims (8)

1 - 20 . (Cancelled)

21 . A semiconductor integrated circuit device, comprising:

a differential amplifier having a first transistor whose input electrode is coupled with a non-inverted input terminal, a second transistor whose input electrode is coupled with an inverted input terminal, common electrodes of the first transistor and the second transistor being coupled with each other, and an output current being outputted to a first output node of the differential amplifier;

a load circuit element which is coupled between the first output node and a first operation voltage node;

a second output node for outputting an output voltage generated by the load circuit element; and

a negative feedback route which is coupled between the second output node and the inverted input terminal,

wherein a first capacitance value of a first capacitor, which is coupled between the common electrodes and the first operation voltage node, is greater than a second capacitance value of a second capacitor, which is coupled between the common electrodes and a second operation voltage node, and

wherein an output signal, which operates in response to an input signal that is inputted to the non-inverted input terminal, is outputted from the second output node.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 8, 2004
From: SAITOH, YOSHIKAZU
To: HITACHI, LTD.; HITACHI ULSI SYSTEMS CO., LTD.
Reel/Frame 015881/0481 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 8, 2004
From: HITACHI, LTD.
To: RENESAS TECHNOLOGY CORPORATION
Reel/Frame 015881/0483 →