Thin film semiconductor device and method for manufacturing same
View Patent ↗In a semiconductor device having an N-channel MOS transistor and a P-channel MOS transistor, each of the N-channel and P-channel MOS transistors is made up of a polycrystal silicon layer, a gate insulating film, and a gate electrode containing a gate polysilicon on a glass substrate. A method of manufacturing the semiconductor device includes the steps of injecting an impurity into the gate polysilicon at a same time as or in a different step of impurity injection at a time of formation of source/drains of the MOS transistors or formation of an LDD (Lightly Doped Drain), to make an N-type of a gate polysilicon in the N-channel MOS transistor and make a P-type of a gate polysilicon in the P-channel MOS transistor and, furthermore, setting a thickness of the polycrystal silicon layer less than the width of a depletion layer which occurs when an inversion channel is formed. Thus, fluctuations in values of threshold voltages of the MOS transistors are reduced to realize low-voltage driving.
1. A thin film semiconductor device comprising:
an N-channel MOS transistor comprising a first region of a polycrystalline silicon layer which is formed on an insulation substrate and into which a first conductivity type of an impurity is implanted, said first region of said polycrystalline silicon layer serving as an activation layer; and
a P-channel MOS transistor comprising a second region of said polycrystalline silicon layer which is formed on said insulation substrate and into which a second conductivity type of an impurity is implanted, said second region of said polycrystalline silicon layer serving as an activation layer;
wherein a first gate electrode is formed via a first gate insulating film on said polycrystalline silicon layer in said N-channel MOS transistor, said first gate electrode comprising an N-type of polysilicon;
wherein a second gate electrode is formed via said second gate insulating film on said polycrystalline silicon layer in said P-channel MOS transistor, said second gate electrode comprising a P-type of polysilicon; and
wherein said polycrystalline layer is formed such that a thickness thereof is smaller than a virtual width of a depletion layer at a time of forming channel inversion, the virtual width of the depletion layer being equal to a distance to which the depletion layer can reach, assuming that said polycrystalline silicon has an adequate thickness.
2. The thin film semiconductor device according to claim 1 , wherein said first and second gate electrodes are formed of a stacked structure which is made up of said polysilicon and metal or said polysilicon and silicide.
3. The thin film semiconductor device according to claim 1 , wherein said polycrystalline silicon layer and said first gate insulating film are provided throughout below at least said first gate electrode and a first gate wiring is connected to said first gate electrode through a contact hole, and wherein said polycrystalline silicon layer and said second gate insulating film are provided throughout below at least said second gate electrode and a second gate wiring is connected to said second gate electrode through a contact hole.
4. The thin film semiconductor device according to claim 1 , wherein a thickness of said polycrystalline silicon layer is set to about 60 nm.