Driving method of organic electroluminescence display

1. A driving method of a flat panel display, comprising:

converting a source data signal to a data signal, wherein the data signal has more bits than the source data signal, wherein the data signal is at least twelve bits;

dividing one frame into a plurality of sub-frames corresponding to the twelve bits of the data signal, wherein each sub-frame includes an on-state time, each on-state time of each sub-frame corresponds to a weight value of each bit of the data signal expressed in a form of a binary code and a non-binary code, wherein the weight values are ratios of the on-state times to the on-state time which is a shortest time among the on-state times, the weight value of the shortest time is 1, and the other weight values are greater than 1;

applying an on-state gate signal to a pixel in each sub-frame to turn on the pixel; and

applying each bit of the data signal corresponding to each sub-frame to the pixel,

wherein the weight values are expressed in a form of an increasing order such that a weight value of an (X+1)th sub-frame is always greater than a weight value of an Xth sub-frame for all positive integer values of X, and a weight value of a (Y+3)th sub-frame is always less than or equal to a summation of weight values of (Y+2)th and (Y+1)th sub-frames for all positive integer values of Y in the non-binary code part, wherein the sub-frames are in consecutive order of (Y+1)th, (Y+2)th and (Y+3)th, and

wherein the weight values of first to third sub-frames of the plurality of sub-frames are expressed in the binary code, and the weight values of other sub-frames are expressed in the non-binary code.

2. The driving method according to claim 1 , wherein the flat panel display is an organic electro-luminescence display.

3. The driving method according to claim 2 , further comprising:

applying a power signal to the pixel in accordance with each bit during the on-state time of each sub-frame.

4. The driving method according to claim 3 , further comprising supplying an off-state gate signal to the pixel after the on-state time of each sub-frame, thereby turning off the pixel.

5. The driving method according to claim 4 , wherein the pixel further includes a first switching transistor supplied with the on-state gate signal, a second switching transistor supplied with the off-state gate signal, and a driving transistor connected with an organic electro-luminescent diode.

6. The driving method according to claim 5 , wherein the first switching transistor applies each bit of the data signal to the driving transistor in accordance with the on-state gate signal in each sub-frame, thereby the driving transistor applying the power signal to the organic electro-luminescent diode during the on-state time of each sub-frame.

7. The driving method according to claim 5 , wherein the second switching transistor applies the power signal to a gate electrode of the driving transistor in accordance with the off-state gate signal in each sub-frame, thereby the driving transistor becoming an off-state and the organic electro-luminescent diode being non-luminous.

8. The driving method according to claim 1 , wherein the data signal has the same gray-level information as the source data signal.

9. A flat panel display device, comprising:

a gate driver for applying an on-state gate signal to a pixel in each sub-frame to turn on the pixel;

a data converter for converting a source data signal to a data signal, wherein the data signal has a number of bits greater than the source data signal; and

a data driver for applying each bit of the data signal corresponding to each sub-frame to the pixel, wherein the data signal is at least twelve bits; and

a timing controller for dividing one frame into a plurality of sub-frames corresponding to the twelve bits of the data signal, wherein each sub-frame includes an on-state time, each on-state time of each sub-frame corresponds to a weight value of each bit of the data signal expressed in a form of a binary code and a non-binary code, wherein the weight values are ratios of the on-state times to the on-state time which is a shortest time among the on-state times, the weight value of the shortest time is 1, and the other weight values are greater than 1,

wherein the weight values are expressed in a form of an increasing order such that a weight value of an (X+1)th sub-frame is always greater than a weight value of an Xth sub-frame for all positive integer values of X, and a weight value of a (Y+3)th sub-frame is always less than or equal to a summation of weight values of (Y+2)th and (Y+1)th sub-frames for all positive integer values of Y in the non-binary code part, wherein the sub-frames are in consecutive order of (Y+1)th, (Y+2)th and (Y+3)th, and

wherein the weight values of first to third sub-frames of the plurality of sub-frames are expressed in the binary code, and the weight values of other sub-frames are expressed in the non-binary code.

10. The flat panel display device according to claim 9 , wherein the flat panel display is an organic electro-luminescence display having an organic electro-luminescent diode in the pixel.

11. The flat panel display device according to claim 10 , further comprising:

a power source applying a power signal to the pixel in accordance with each bit during the on-state time of each sub-frame.

12. The flat panel display device according to claim 11 , wherein the gate driver further supplies an off-state gate signal to the pixel after the on-state time of each sub-frame, thereby turning off the pixel.

13. The flat panel display device according to claim 12 , wherein the pixel further includes a first switching transistor supplied with the on-state gate signal, a second switching transistor supplied with the off-state gate signal, and a driving transistor connected with an organic electro-luminescent diode.

14. The flat panel display device according to claim 13 , wherein the first switching transistor applies each bit of the data signal to the driving transistor in accordance with the on-state gate signal in each sub-frame, thereby the driving transistor applying the power signal to the organic electro-luminescent diode during the on-state time of each sub-frame.

15. The flat panel display device according to claim 13 , wherein the second switching transistor applies the power signal to a gate electrode of the driving transistor in accordance with the off-state gate signal in each sub-frame, thereby the driving transistor becoming an off-state and the organic electro-luminescent diode being non-luminous.

16. The flat panel display device according to claim 9 , wherein the data signal has the same gray-level information as the source data signal.

17. A driving method of a flat panel display device having a pixel, comprising:

converting a N-bit source data signal to a M-bit data signal, the M-bit data signal having both a binary code and a non-binary code, wherein each of N and M is an integer, M is greater than N, a number of the sub-frames is equal to M;

dividing one frame into a plurality of sub-frames, wherein each sub-frame includes an on-state time, and the on-state time of each sub-frame corresponds to a weight value of each bit of the data signal expressed in the form of a binary code and a non-binary code, wherein the weight values are ratios of the on-state times to the on-state time which is a shortest time among the on-state times, the weight value of the shortest time is 1, the other weight values are greater than 1; and

applying each bit of the M-bit data signal to the pixel in each sub-frame, wherein M is at least twelve bits,

wherein the weight value of the bit in the binary code is expressed in a form of a binary code,

wherein the weight values are expressed in a form of an increasing order such that a weight value of an (X+1)th sub-frame is always greater than a weight value of an Xth sub-frame for all positive integer values of X, and a weight value of a (Y+3)th sub-frame is always less than or equal to a summation of weight values of (Y+2)th and (Y+1)th sub-frames for all positive integer values of Y in the non-binary code part, wherein the sub-frames are in consecutive order of (Y+1)th, (Y+2)th and (Y+3)th, and

wherein the weight values of first to third sub-frames of the plurality of sub-frames are expressed in the binary code, and the weight values of other sub-frames are expressed in the non-binary code.

18. The driving method according to claim 17 , wherein the flat panel display is an organic electro-luminescence display.

19. The driving method according to claim 18 , further comprising:

applying a power signal to the pixel in accordance with each bit of the M-bit data signal during the on-state time of each sub-frame.

20. The driving method according to claim 19 , further comprising supplying an off-state gate signal to the pixel after the on-state time of each sub-frame, thereby turning off the pixel.

21. The driving method according to claim 20 , wherein the pixel further includes a first switching transistor supplied with the on-state gate signal, a second switching transistor supplied with the off-state gate signal, and a driving transistor connected with an organic electro-luminescent diode.

22. The driving method according to claim 21 , wherein the first switching transistor applies each bit of the data signal to the driving transistor in accordance with the on-state gate signal in each sub-frame, thereby the driving transistor applying the power signal to the organic electro-luminescent diode during the on-state time of each sub-frame.

23. The driving method according to claim 21 , wherein the second switching transistor applies the power signal to a gate electrode of the driving transistor in accordance with the off-state gate signal in each sub-frame, thereby the driving transistor becoming an off-state and the organic electro-luminescent diode being non-luminous.

24. The driving method according to claim 17 , wherein the N-bit source data signal has the same gray-level information as the M-bit data signal.

25. A driving method of a flat panel display, comprising:

converting a N-bit source data signal to a M-bit data signal, the M-bit data signal having both a binary code part and a non-binary code part, wherein each of N and M is an integer, M is greater than N;

dividing one frame into a plurality of sub-frames, wherein each sub-frame includes an on-state time each on-state time of each sub-frame corresponds to a weight value of each bit of the data signal expressed in a form of a binary code and a non-binary code, a number of the sub-frames is equal to M, wherein the weight values are ratios of the on-state times to the on-state time which is a shortest time among the on-state times, the weight value of the shortest time is 1, the other weight values are greater than 1; and

applying each bit of the M-bit data signal to the pixel in each sub-frame, wherein M is at least twelve bits,

wherein the weight value of the bit in the binary code is expressed in a form of a binary code, wherein the weight values are expressed in a form of an increasing order such that a weight value of an (X+1)th sub-frame is always greater than a weight value of an Xth sub-frame for all positive integer values of X, and a weight value of a (Y+3)th sub-frame is always less than or equal to a summation of weight values of (Y+2)th and (Y+1)th sub-frames for all positive integer values of Y in the non-binary code part, wherein the sub-frames are in consecutive order of (Y+1)th, (Y+2)th and (Y+3)th, and

wherein the weight values of first to third sub-frames of the plurality of sub-frames are expressed in the binary code, and the weight values of other sub-frames are expressed in the non-binary code.