Low-power integrated-circuit signal processor with wide dynamic range
An integrated circuit includes at least three separate power supply terminals, at least one for those portions of the circuit that must accommodate the widest signal-related voltage excursion, at least one for those that experience substantially smaller signal-related voltage excursions, and a common terminal.
1. An integrated circuit disposed on a substrate and containing at least one analog circuitry section for producing a final analog output information signal in response to a first analog input information signal, the integrated circuit comprising:
a first analog circuitry subsection disposed on the substrate, wherein the first analog circuitry subsection is configured to produce an intermediate analog output voltage signal in response to said first analog input information signal;
a voltage-to-current conversion circuitry subsection, the voltage-to-current conversion circuitry subsection including a resistor and capacitor connected in series;
a second analog circuitry subsection disposed on the substrate, wherein the second analog circuitry subsection is coupled to the voltage-to-current conversion circuitry subsection and configured to accept an intermediate analog input current signal proportional to said intermediate output voltage signal and produce said final analog output information signal in response to said intermediate analog input current signal, wherein the voltage-to-current conversion circuitry subsection is configured and arranged in series between and connects the first analog circuitry and the second analog circuitry subsection;
a first power-supply-voltage terminal coupled to said first analog circuitry subsection;
a second power-supply-voltage terminal coupled to said second analog circuitry subsection; and
a third power-supply-voltage terminal coupled to said first analog circuitry subsection and said second analog circuitry subsection;
wherein the available dynamic range of said intermediate analog output voltage signal is designed to exceed the difference in voltage applied between said second and third power-supply terminals.
2. An integrated circuit according to claim 1 , wherein said second analog subsection is configured so as to produce an analog output current in response to said intermediate analog input current.
3. An integrated circuit according to claim 1 , wherein said second analog subsection is configured so as to produce the final analog output information signal in response to said intermediate analog input current, and wherein said final analog output information signal comprises a voltage signal that is substantially less in total excursion than said intermediate output voltage.
4. An integrated circuit according to claim 1 , wherein the first analog circuitry subsection comprises a first independent amplifier and the second analog circuitry subsection comprises a second independent amplifier.
5. An integrated circuit according to claim 4 , wherein no feedback occurs between the first and second independent amplifiers.
6. An integrated circuit according to claim 4 , wherein the circuit is configured and arranged to receive respective different power supplies by each of the first and second independent amplifiers.
7. An integrated circuit according to claim 6 , wherein the first and second independent amplifiers are configured and arranged to accommodate a power supply difference substantially greater than 1 Vbe.