Lower substrate, IPS mode liquid crystal display device and method for manufacturing the same

1. A lower substrate for an IPS mode LCD device, comprising:

a substrate;

a gate line formed on the substrate;

a data line formed on the substrate crossing the gate line, a pixel region defined by intersections of the gate line with first and second data lines;

a thin film transistor connected to the gate line and the first data line;

a pixel electrode formed at the pixel region and connected to the thin film transistor, the pixel electrode having a plurality of first bars and having a stacked structure of a transparent oxide metal layer and a colored metal layer;

a common electrode formed overlapping the gate line, the data lines and the thin film transistor, the common electrode having a plurality of second bars integrated with the first bars of the pixel electrode and having a stacked structure of a transparent metal oxide layer and a colored metal layer; and

a color filter layer disposed at positions corresponding to the pixel region of the substrate.

2. The lower substrate according to claim 1 , wherein the color filter layer is formed on the thin film transistor.

3. The lower substrate according to claim 1 , wherein the common electrode is used as a light shielding layer.

4. The lower substrate according to claim 1 , wherein the transparent metal oxide layer is formed of oxide metal selected from a transparent conductive metal group consisting of indium tin oxide (ITO) and indium zinc oxide (IZO).

5. The lower substrate according to claim 1 , wherein the colored metal layer is formed of metal element selected from a group consisting of Cr, Mo, Ti, Ta and W.

6. The lower substrate according to claim 1 , wherein the colored metal layer has a stacked structure with one of Cr, Mo, Ti, Ta and Wand one of the oxide metals.

7. The lower substrate according to claim 1 , wherein the pixel electrode, the plurality of first bars of the pixel electrode, and the plurality of second bars of the common electrode on the pixel region are made of a transparent metal oxide material.

8. The lower substrate according to claim 7 , wherein the common electrode is used as a light shielding layer.

9. The lower substrate according to claim 7 , wherein the transparent metal oxide layer is formed of oxide metal selected from the transparent conductive metal group consisting of ITO and IZO.

10. The lower substrate according to claim 7 , wherein the colored metal layer is formed of metal element selected from the group consisting of Cr, Mo, Ti, Ta and W.

11. The lower substrate according to claim 7 , wherein the colored metal layer has a stacked structure with one of Cr, Mo, Ti, Ta and W and one of the oxide metals.

12. The lower substrate according to claim 1 , wherein the pixel electrode is formed at a central portion of the pixel region.

13. An IPS mode LCD device, comprising:

a lower substrate including:

a substrate,

first and second of gate lines formed on the substrate,

a data line formed on the lower substrate crossing the first and second gate lines, a pixel region defined by intersections of the first and second gate lines with first and second data lines,

a thin film transistor connected to the first gate line and the first data line,

a pixel electrode formed at the pixel region and connected to the thin film transistor, the pixel electrode having a plurality of first bars and having a stacked structure of a transparent metal oxide layer and a colored metal layer,

a common electrode formed overlapping the gate line, the data line and the thin film transistor, the common electrode having a plurality of second bars integrated with the first bars of the pixel electrode and having a stacked structure of a transparent metal oxide layer and a colored metal layer, and

a color filter layer disposed at positions corresponding to the pixel region of the lower substrate;

an upper substrate spaced by a predetermined interval from the lower substrate; and

a liquid crystal layer interposed between the upper substrate and the lower substrate.

14. A method for manufacturing a lower substrate for an IPS mode LCD device, the method comprising:

forming a gate line on a substrate;

forming a data line on the substrate to cross the gate line, a pixel region defined by intersections of the gate line with the data line;

forming a thin film transistor connected to the gate line and the data line;

forming a color filter layer on the pixel region including the gate line, the data line and the thin film transistor; and

forming a pixel electrode and a common electrode on the color filter layer, the pixel electrode being connected to the thin film transistor and having a plurality of first bars, the common electrode overlapping the gate line, the data line and the thin film transistor and having a plurality of second bars integrated with the plurality of first bars of the pixel electrode, and the common electrode having a stacked structure of a transparent metal oxide layer and a colored metal layer.

15. The method according to claim 14 , wherein the pixel electrode has a stacked structure of a transparent metal oxide layer and a colored metal layer.

16. The method according to claim 14 , wherein the common electrode is used as a light shielding layer.

17. The method according to claim 15 , wherein the transparent metal oxide layer is formed of oxide metal selected from a transparent conductive metal group consisting of ITO and IZO.

18. The method according to claim 15 , wherein the colored metal layer is formed of metal element selected from a group consisting of Cr, Mo, Ti, Ta and W.

19. The method according to claim 15 , wherein the colored metal layer has a stacked structure with one of Cr, Mo, Ti, Ta and W and one of the oxide metals.

20. The method according to claim 14 , wherein the pixel electrode, the first bars of the pixel electrode, and the second bars of the common electrode on the pixel region are made of a transparent metal oxide material.

21. The method according to claim 20 , wherein the common electrode is used as a light shielding layer.

22. The method according to claim 20 , wherein the transparent metal oxide layer is formed of oxide metal selected from the transparent conductive metal group consisting of ITO and IZO.

23. The method according to claim 20 , wherein the colored metal layer is formed of metal element selected from the group consisting of Cr, Mo, Ti, Ta and W.

24. The method according to claim 20 , wherein the colored metal layer has a stack structure with one of Cr, Mo, Ti, Ta and W and one of the oxide metals.

25. The method according to claim 14 , wherein the pixel electrode is formed at a central portion of the pixel region.

26. A method for manufacturing an IPS mode LCD device, the method comprising:

forming a gate line on a lower substrate;

forming a data line on the substrate to cross the gate line, a pixel region defined by intersections of the gate line with the data line;

forming a thin film transistor connected to the gate line and the data line;

forming a color filter layer on the pixel region including the gate line, the data line and the thin film transistor;

forming a pixel electrode and a common electrode on the color filter layer, the pixel electrode being connected to the thin film transistor and having a plurality of first bars, the common electrode overlapping the gate line, the data line and the thin film transistor and having a plurality of second bars integrated with the plurality of first bars of the pixel electrode, and the common electrode having a stacked structure of a transparent metal oxide layer and a colored metal layer;

joining an upper substrate with the lower substrate with a predetermined interval therebetween; and

interposing a liquid crystal layer between the upper substrate and the lower substrate.