Resolution enhanced folding amplifier
A folding amplifier. The novel folding amplifier includes a first circuit for receiving an input signal and a plurality of reference signals and in accordance therewith generating a plurality of differential signals, a second circuit for receiving the differential signals and in accordance therewith generating first and second output signals for each differential signal, and a third circuit for combining selected output signals to generate a folding signal. The first circuit is implemented using a plurality of differential gain stages that drive the second circuit, comprised of a plurality of folding stages. The gain of the differential gain stages and the separation between reference signals is chosen such that adjacent folding stages do not conduct simultaneously.
1 . A folding amplifier comprising:
first means for receiving an input signal and a plurality of reference signals and in accordance therewith generating a plurality of differential signals;
second means for receiving said differential signals and in accordance therewith generating first and second output signals for each differential signal; and
third means for combining selected output signals to generate a folding signal.
2 . The invention of claim 1 wherein said first output signal gradually transitions from a first level to a second level over an input range of said input signal, and said second output signal transitions from said second level to said first level inversely to said first output signal.
3 . The invention of claim 2 wherein each differential signal is an amplified difference between said input signal and one of said reference signals.
4 . The invention of claim 3 wherein said reference signals are equally spaced by a predetermined reference voltage separation.
5 . The invention of claim 4 wherein said first means includes a plurality of differential amplifiers of gain K, each adapted to receive said input signal and one of said reference voltages.
6 . The invention of claim 5 wherein said gain K and said predetermined reference voltage separation are chosen such that said input ranges do not overlap.
7 . The invention of claim 5 wherein said second means includes a plurality of folding stages, each adapted to receive one of said differential signals.
8 . The invention of claim 7 wherein each folding stage includes a differential pair of transistors.
9 . The invention of claim 8 wherein each differential amplifier includes a positive output terminal and a negative output terminal.
10 . The invention of claim 9 wherein an input of a first transistor of said differential pair is coupled to said positive output terminal and an input of a second transistor of said differential pair is coupled to said negative output terminal.
11 . The invention of claim 8 wherein said first and second output signals are the currents output from the collectors of the transistors of said differential pair.
12 . The invention of claim 8 wherein the emitters of the transistors of each differential pair are connected in common to a current source.
13 . The invention of claim 10 wherein said third means includes a first summing node adapted to combine one of said output signals from each folding stage.
14 . The invention of claim 13 wherein said third means further includes a second summing node adapted to combine output signals not combined by said first summing node.
15 . The invention of claim 14 wherein said folding stages are cross-coupled such that if the first transistor in a folding stage is coupled to said first summing node, then the first transistor of an adjacent folding stage is coupled to said second summing node.
16 . The invention of claim 14 wherein said folding signal is generated from the voltage difference between said first and second summing nodes.
17 . A folding amplifier comprising:
a plurality of differential gain stages, each adapted to receive an input signal and a reference voltage, and generate a differential signal corresponding to a difference between said input signal and said reference signal, amplified by a gain K;
a plurality of folding stages, each adapted to receive a differential signal from one of said differential gain stages and in accordance therewith generate first and second output signals, wherein said first output signal gradually transitions from a first level to a second level over an input range of said input signal, and said second output signal transitions from said second level to said first level inversely to said first output signal; and
a first summing node for combining selected output signals from said folding stages to generate a folding signal.
18 . The invention of claim 16 wherein each gain stage is supplied with a different reference voltage such that said reference voltages are equally spaced by a predetermined reference voltage separation.
19 . The invention of claim 18 wherein said gain K and said predetermined reference voltage separation are chosen such that said input ranges do not overlap.
20 . The invention of claim 16 wherein each folding stage includes a differential pair of transistors.
21 . The invention of claim 20 wherein each differential gain stage includes a positive output terminal and a negative output terminal.
22 . The invention of claim 21 wherein an input of a first transistor of said differential pair is coupled to said positive output terminal and an input of a second transistor of said differential pair is coupled to said negative output terminal.
23 . The invention of claim 20 wherein said first and second output signals are the currents output from the collectors of the transistors of said differential pair.
24 . The invention of claim 20 wherein the emitters of the transistors of each differential pair are connected in common to a current source.
25 . The invention of claim 22 wherein said folding amplifier further includes a second summing node adapted to combine output signals not combined by said first summing node.
26 . The invention of claim 25 wherein said folding stages are cross-coupled such that if the first transistor in a folding stage is coupled to said first summing nodes then the first transistor of an adjacent folding stage is coupled to said second summing node.
27 . The invention of claim 25 wherein said folding signal is generated from the voltage difference between said first and second summing nodes.
28 . A folding analog to digital converter (ADC) comprising:
a folding amplifier comprising:
a plurality of differential gain stages, each adapted to receive an input signal and a reference voltage, and generate a differential signal corresponding to a difference between said input signal and said reference signal, amplified by a gain K;
a plurality of folding stages, each adapted to receive a differential signal from one of said differential gain stages and in accordance therewith generate first and second output signals, wherein said first output signal gradually transitions from a first level to a second level over an input range of said input signal, and said second output signal transitions from said second level to said first level inversely to said first output signal; and
a first summing node for combining selected output signals from said folding stages to generate a folding signal;
a circuit for converting said folding signal to an N-bit digital word corresponding to the least significant bits of the ADC output; and
a circuit for converting said input signal to an M-bit digital word corresponding to the most significant bits of the ADC output.
29 . A method for folding a signal including the steps of:
receiving an input signal and a plurality of reference signals, wherein said reference voltages are equally spaced by a predetermined reference voltage separation;
generating a plurality of differential signals, each differential signal corresponding to a difference between an input signal and a reference signal, amplified by a gain K;
generating first and second output signals for each differential signal, wherein said first output signal gradually transitions from a first level to a second level over an input range of said input signal, and said second output signal transitions from said second level to said first level inversely to said first output signal; and
combining selected output signals to generate a folding signal.
30 . The invention of claim 27 wherein said method further includes selecting said gain K and said predetermined reference voltage separation such that said input ranges do not overlap.