Thin film transistor substrate for display device and fabricating method thereof
View Patent ↗A thin film transistor substrate for a display device having a plurality of thin film transistors and pixel electrodes connected to the thin film transistors, said thin film transistor substrate includes: a plurality of pad electrodes in a non-display area of the display device for applying signals to the plurality of thin film transistors in a non-display area of the display device; a protective film covering the pad electrodes in the non-display area; and a slit in the protective film adjacent to at least one of the plurality of pad electrodes.
1. A method of fabricating a thin film transistor substrate for a display device having a plurality of thin film transistors and pixel electrodes connected to the thin film transistors, said method comprising the steps of:
forming a gate insulating film in a display area and in a non-display area of the display device;
forming a plurality of signal lines on the gate insulating film in the non-display area for applying signals to the thin film transistors in the display area;
forming a protective film covering the thin film transistors and the signal lines;
forming a photo-resist pattern on the protective film;
patterning the protective film and the gate insulating film using the photo-resist pattern to form a slit adjacent to the plurality of signal lines;
forming a transparent conductive film on the photo-resist pattern and within the slit; and
removing the photo-resist pattern and a portion of the transparent conductive film on the photo-resist pattern with a stripper that infiltrates between the photo-resist pattern and the protective film through the slit.
2. The method as claimed in claim 1 , wherein said step of forming a plurality of signal lines includes:
forming a gate line and a data line connected to the thin film transistor with the gate insulating film therebetween so that the gate line and data line cross each other and define a pixel area.
3. The method as claimed in claim 2 , further comprising the steps of:
forming a gate link connected to the gate line and a lower gate pad electrode connected to the gate link in said non-display area during formation of the plurality of signal lines;
forming a plurality of contact holes passing through the gate insulating film and the protective film above the lower gate pad electrode at the same time as forming the slit during the patterning step; and
forming an upper gate pad electrode within the plurality of contact holes during formation of the pixel electrode.
4. The method as claimed in claim 3 , wherein the slit passes through the protective film and the gate insulating film at a portion between the gate pads or between the gate links.
5. The method as claimed in claim 3 , wherein the slit between the gate pads is separately formed in such a manner as to avoid an area adjacent to the upper gate pad electrode.
6. The method as claimed in claim 4 , wherein the slit between the gate pads is also between the gate links.
7. The method as claimed in claim 2 , further comprising the steps of:
forming a data link connected to the data line and a lower data pad electrode connected to the data link in said non-display area during formation of the signal lines;
forming a plurality of contact holes passing through the protective film on the lower data pad electrode at the same time as forming the slit during the patterning step; and
forming an upper data pad electrode within the plurality of contact holes.
8. The method as claimed in claim 7 , wherein the slit passes through the protective film and the gate insulating film at a portion between the data pads or between the data links.
9. The method as claimed in claim 8 , wherein the slit between the data pads is separately formed in such a manner as to avoid an area adjacent to the upper data pad electrode.
10. The method as claimed in claim 8 , wherein the slit between the data pads is also between the data links.
11. The method as claimed in claim 1 , wherein said step of forming the signal lines includes:
forming a line on glass (LOG) type signal line for supplying a driving signal required for a driver driving the gate lines and the data lines at said non-display area.
12. The method as claimed in claim 11 , wherein the slit passes through the protective film and the gate insulating film above the LOG-type signal line or between the LOG-type signal lines.
13. The method as claimed in claim 1 , wherein during formation of the slit, the protective film is over-etched such that the edge portion of the photo-resist pattern is more protruded than that of the protective film.
14. The method as claimed in claim 1 , further comprising the step of:
forming shorting bars connected to the signal lines during formation of the plurality of signal lines, wherein a slit also is provided between the shorting bars.
15. The method as claimed in claim 3 , wherein the transparent conductive film is also formed in the contact holes during the patterning step.
16. The method as claimed in claim 15 , wherein after the removing step, a portion of the transparent conductive film remains in the contact holes.
17. The method as claimed in claim 1 , wherein after the removing step, a portion of the transparent conductive film remains in the slit.
18. The method as claimed in claim 1 , wherein after the removing step, a transparent conductive pattern is left within the slit.