Post passivation interconnection process and structures
View Patent ↗A system and method for forming post passivation metal structures is described. Metal interconnections and high quality electrical components, such as inductors, transformers, capacitors, or resistors are formed on a layer of passivation, or on a thick layer of polymer over a passivation layer.
1. A circuit component comprising:
a silicon substrate;
a transistor in and on said silicon substrate;
a first dielectric layer over said silicon substrate;
a first metal layer over said first dielectric layer;
a second metal layer over said first dielectric layer and over said first metal layer;
a second dielectric layer over said first dielectric layer and between said first and second metal layers wherein said second dielectric layer has a thickness between 0.1 and 1 micrometer;
a metal trace over said first dielectric layer;
a first contact point over said silicon substrate;
a second contact point over said silicon substrate, wherein said first contact point is separate from said second contact point;
a passivation layer over said metal trace, over said first and second dielectric layers and over said first and second metal layers, wherein said passivation layer comprises an oxide layer and a nitride layer;
a polymer layer on said passivation layer, wherein said polymer layer has a thickness between 2 and 150 micrometers and greater than that of said passivation layer, wherein a first opening in said polymer layer is over said first contact point and exposes said first contact point, wherein a second opening in said polymer layer is over said second contact point and exposes said second contact point, and wherein said polymer layer comprises polyimide;
a coil on said polymer layer, wherein said coil comprises a glue/barrier layer on said polymer layer, a seed layer comprising a first copper layer having a thickness between 0.2 and 1 micrometer on said glue/barrier layer and over said polymer layer, and an electroplated metal layer comprising a second copper layer having a thickness between 3 and 20 micrometers on said first copper layer, wherein there is an undercut with an edge of said glue/barrier layer recessed from an edge of said electroplated metal layer, and wherein a first product of resistance of a first section of said coil times capacitance of said first section is smaller than a second product of resistance of a second section of said metal trace times capacitance of said second section by at least 100 times, said first section having a same length as said second section; and
a metal line on said polymer layer and over said first and second contact points, wherein said first contact point is connected to said second contact point through said metal line.
2. The circuit component of claim 1 , wherein said second dielectric layer comprises a silicon-based oxide.
3. The circuit component of claim 1 , wherein said second dielectric layer comprises CVD silicon oxide.
4. The circuit component of claim 1 , wherein said second dielectric layer comprises CVD TEOS oxide.
5. The circuit component of claim 1 , wherein said second dielectric layer comprises spin-on-glass (SOG).
6. The circuit component of claim 1 , wherein said second dielectric layer comprises fluorosilicate glass (FSG).
7. The circuit component of claim 1 , wherein said second dielectric layer comprises high density plasma CVD oxide.
8. The circuit component of claim 1 , wherein said glue/barrier layer comprises titanium.
9. The circuit component of claim 1 , wherein said glue/barrier layer comprises a titanium-tungsten alloy.
10. The circuit component of claim 1 , wherein said glue/barrier layer comprises titanium nitride.
11. The circuit component of claim 1 , wherein said glue/barrier layer comprises tantalum nitride.
12. The circuit component of claim 1 , wherein said glue/barrier layer comprises chromium.
13. The circuit component of claim 1 , wherein said glue/barrier layer has a thickness between 0.02 and 0.2 micrometers.
14. The circuit component of claim 1 , wherein said electroplated metal layer further comprises a nickel-containing layer on said second copper layer.
15. The circuit component of claim 14 , wherein said nickel-containing layer has a thickness between 0.1 and 3 micrometers.
16. The circuit component of claim 1 , wherein said coil comprises an inductor.
17. The circuit component of claim 1 , wherein said first product is smaller than said second product by at least 1000 times.
18. The circuit component of claim 1 , wherein said first product is smaller than said second product by at least 10,000 times.
19. A circuit component comprising:
a silicon substrate;
a transistor in and on said silicon substrate;
a first dielectric layer over said silicon substrate;
a first metal layer over said first dielectric layer;
a second metal layer over said first dielectric layer and over said first metal layer;
a second dielectric layer over said first dielectric layer and between said first and second metal layers, wherein said second dielectric layer has a thickness between 0.1 and 1 micrometer;
a metal trace over said first dielectric layer;
a passivation layer over said metal trace, over said first and second dielectric layers and over said first and second metal layers, wherein said passivation layer comprises an oxide layer and a nitride layer;
a polymer layer on said passivation layer, wherein said polymer layer has a thickness between 2 and 150 micrometers and greater than that of said passivation layer; and
a coil on said polymer layer, wherein said coil comprises a glue/barrier layer comprising titanium on said polymer layer, a seed layer comprising a first gold layer having a thickness between 0.03 and 0.3 micrometers on said glue/barrier layer and over said polymer layer, and an electroplated metal layer comprising a second gold layer having a thickness between 1 and 20 micrometers on said first gold layer, wherein an undercut with an edge of said glue/barrier layer recessed from an edge of said electroplated metal layer is between 0.1 and 1 micrometer, and wherein a first product of resistance of a first section of said coil times capacitance of said first section is smaller than a second product of resistance of a second section of said metal trace times capacitance of said second section by at least 100 times, said first section having a same length as said second section.
20. The circuit component of claim 19 , wherein said polymer layer comprises polyimide.
21. The circuit component of claim 19 , wherein said polymer layer comprises benzocyclobutene (BCB).
22. The circuit component of claim 19 , wherein said polymer layer comprises parylene.
23. The circuit component of claim 19 , wherein said polymer layer comprises an epoxy-based material.
24. The circuit component of claim 19 , wherein said coil composes an inductor.
25. The circuit component of claim 19 , wherein said coil composes a part of a transformer.
26. The circuit component of claim 19 , wherein said second dielectric layer comprises a silicon-based oxide.
27. The circuit component of claim 19 , wherein said second dielectric layer comprises CVD silicon oxide.
28. The circuit component of claim 19 , wherein said second dielectric layer comprises CVD TEOS oxide.
29. The circuit component of claim 19 , wherein said second dielectric layer comprises spin-on-glass (SOG).
30. The circuit component of claim 19 , wherein said second dielectric layer comprises fluorosilicate glass (FSG).
31. The circuit component of claim 19 , wherein said second dielectric layer comprises high density plasma CVD oxide.
32. The circuit component of claim 19 , wherein said glue/barrier layer further comprises tungsten.
33. The circuit component of claim 19 , wherein said glue/barrier layer further comprises nitrogen.
34. The circuit component of claim 19 , wherein said glue/barrier layer has a thickness between 0.05 and 0.5 micrometers.
35. The circuit component of claim 19 , wherein said first product is smaller than said second product by at least 1000 times.
36. The circuit component of claim 19 , wherein said first product is smaller than said second product by at least 10,000 times.