Low noise amplifier with low noise, high isolation bias circuit

1. A low noise amplifier comprising:

an input to receive an input signal;

an output to output an output signal, said output signal being an amplified signal of said input signal;

bias circuit connected between a first voltage terminal and a second voltage terminal;

an output transistor connected between said first voltage terminal and said second voltage terminal, said output being connected to said output transistor;

a bias signal path connected between said bias circuit and a control terminal of said output transistor, said input being connected to said bias signal path; and

a high impedance electrical element having both inductance and capacitance located on said bias signal path between said bias circuit and said output transistor, said high impedance electrical element providing noise isolation of said bias circuit from said input to reduce noise in said output signal, wherein said high impedance electrical element includes an inductor and a capacitor that are connected in parallel on said bias signal oath or a grounded transmission line on said bias signal path.

2. The low noise amplifier of claim of 1 wherein said output transistor is an n-channel field effect transistor.

3. The low noise amplifier of claim 1 further comprising a resistor connected in series with said the high impedance electrical element on said bias signal path.

4. The low noise amplifier of claim 1 further comprising an inductor and a capacitor connected in series between a node on said bias signal path and said second voltage terminal, said bias circuit providing a reference voltage at said node.

5. The low noise amplifier of claim of claim 1 wherein said bias circuit includes a resistor and a transistor that are connected in series between said first voltage terminal and said second voltage terminal.

6. The low noise amplifier of claim 1 further comprising a capacitor connected between a node on said bias signal path and said second voltage terminal, said bias circuit providing a reference voltage at said node.

7. A method for amplifying an input signal, said method comprising:

providing an output transistor and a bias circuit connected to a control terminal of said output transistor, said bias circuit including a resistor and a transistor that are connected in series between a first voltage terminal and a second voltage terminal;

providing a high impedance electrical element having both inductance and capacitance located on a bias signal path connected between a control terminal of said transistor of said bias circuit and said control terminal of said output transistor, said high impedance electrical clement providing noise isolation between said bias circuit and said output transistor to reduce noise introduccd into said output transistor;

receiving said input signal at said control terminal of said output transistor, and

amplifing said input signal using said output transistor to produce an output signal.

8. The method of claim 7 wherein said high impedance electrical element includes an inductor and a capacitor that are connected in parallel.

9. The method of claim 7 wherein said high impedance electrical element includes a grounded transmission line.

10. The method of claim 9 further comprising providing an inductor and a capacitor connected in series between a node on a bias signal path and a voltage terminal, said bias signal path being connected to said bias circuit and said output transistor, said bias circuit providing a reference voltage at said node.

11. A low noise amplifier comprising:

an input to receive an input signal;

an output to output an output signal, said output signal being an amplified signal of said input signal;

a bias circuit connected between a first voltage terminal and a second voltage terminal, said bias circuit including a resistor and a transistor that are connected in series;

an output transistor connected between said first voltage terminal and said second voltage terminal, said output being connected to said output transistor;

a bias signal path connected between a control terminal of said transistor and a control terminal of said output transistor, said input being connected to said bias signal path; and

a high impedance electrical element having both inductance and capacitance located on said bias signal path between said bias circuit and said input, said high impedance electrical element providing noise isolation of said bias circuit from said input to reduce noise in said output signal.

12. The low noise amplifier of claim of 11 wherein said output transistor is an n-channel field effect transistor.

13. The low noise amplifier of claim 11 wherein said high impedance electrical clement includes an inductor and a capacitor that are connected in parallel on said bias signal pat.

14. The low noise amplifier of claim 13 farther comprising a resistor connected in series with said high impedance electrical element on said bias signal path.

15. The low noise amplifier of claim 11 wherein said high impedance electrical element includes a grounded transmission line on said bias signal path.

16. The low noise amplifier of claim 15 further comprising an inductor and a capacitor connected in series between a node on said bias signal path and said second voltage terminal, said bias circuit providing a reference voltage at said node.

17. The low noise amplifier of claim 11 further comprising a capacitor connected between a node on said bias signal path and said second voltage terminal, said bias circuit providing a reference voltage at said node.