Computer system architecture using a proximity I/O switch
View Patent ↗One embodiment of the present invention provides a proximity I/O switch, which is configured to transfer data between the components in a computer system. This proximity I/O switch is comprised of multiple switch chips, which are coupled together through capacitive coupling. This enables the multiple switch chips to communicate with each other without being constrained by the limitations of conventional non-capacitive communication mechanisms. The multiple switch chips in the proximity I/O switch are also configured to communicate with components in the computer system through conventional non-capacitive communication mechanisms.
1. An apparatus for transferring data between components in a computer system, comprising:
a proximity I/O switch configured to transfer data between the components in the computer system;
wherein the proximity I/O switch is comprised of multiple switch chips which are coupled together and are configured to collectively function as a switch;
wherein the multiple switch chips are configured to communicate with each other through capacitive coupling, whereby the multiple switch chips can communicate with each other without being constrained by the limitations of conventional non-capacitive communication mechanisms; and
wherein the multiple switch chips in the proximity I/O switch are configured to communicate with the components in the computer system through conventional non-capacitive communication mechanisms.
2. The apparatus of claim 1 , wherein the multiple switch chips are alternately oriented face-up and face-down in an array, so that capacitive communication surfaces on active faces of the multiple switch chips overlap, thereby facilitating capacitive communication between the multiple switch chips.
3. The apparatus of claim 2 , wherein the array of switch chips is two-dimensional so that corners of alternately oriented (face-up and face-down) switch chips overlap.
4. The apparatus of claim 3 , the multiple switch chips in the array are permanently or removably attached to one or more Micro-Electro-Mechanical System (MEMS) jig-plates, which are fabricated to accommodate the multiple switch chips.
5. The apparatus of claim 3 , wherein switch chips on the perimeter of the two-dimensional array of switch chips are configured to communicate with the components in the computer system through the conventional non-capacitive communication mechanisms.
6. The apparatus of claim 1 , wherein the conventional non-capacitive communication mechanisms include:
electrically conductive connections; and
optical communication mechanisms.
7. The apparatus of claim 1 , wherein the components in the computer system include:
processors;
memories;
peripheral devices; and
network interfaces.
8. A computer system including a proximity I/O switch for transferring data, comprising:
a processor;
a memory;
a proximity I/O switch configured to transfer data between the components in the computer system, wherein the components include the processor and the memory;
wherein the proximity I/O switch is comprised of multiple switch chips which are coupled together and are configured to collectively function as a switch;
wherein the multiple switch chips are configured to communicate with each other through capacitive coupling, whereby the multiple switch chips can communicate with each other without being constrained by the limitations of conventional non-capacitive communication mechanisms; and
wherein the multiple switch chips in the proximity I/O switch are configured to communicate with the components in the computer system through conventional non-capacitive communication mechanisms.
9. The computer system of claim 8 , wherein the multiple switch chips are alternately oriented face-up and face-down in an array, so that capacitive communication surfaces on active faces of the multiple switch chips overlap, thereby facilitating capacitive communication between the multiple switch chips.
10. The computer system of claim 9 , wherein the array of switch chips is two-dimensional so that corners of alternately oriented (face-up and face-down) switch chips overlap.
11. The computer system of claim 10 , wherein the multiple switch chips in the array are permanently or removably attached to one or more Micro-Electro-Mechanical System (MEMS) jig-plates, which are fabricated to accommodate the multiple switch chips.
12. The computer system of claim 10 , wherein switch chips on the perimeter of the two-dimensional array of switch chips are configured to communicate with the components in the computer system through the conventional non-capacitive communication mechanisms.
13. The computer system of claim 8 , wherein the conventional non-capacitive communication mechanisms include:
electrically conductive connections; and
optical communication mechanisms.
14. The computer system of claim 8 , wherein the components in the computer system include:
processors;
memories;
peripheral devices; and
network interfaces.
15. A method for transferring data between components in a computer system, comprising:
transferring data between the components in the computer system through a proximity I/O switch;
wherein the proximity I/O switch is comprised of multiple switch chips which are coupled together and are configured to collectively function as a switch;
wherein the multiple switch chips communicate with each other through capacitive coupling, whereby the multiple switch chips can communicate with each other without being constrained by the limitations of conventional non-capacitive communication mechanisms; and
wherein the multiple switch chips in the proximity I/O switch communicate with the components in the computer system through conventional non-capacitive communication mechanisms.
16. The method of claim 15 , wherein the multiple switch chips are alternately oriented face-up and face-down in an array, so that capacitive communication surfaces on active faces of the multiple switch chips overlap, thereby facilitating capacitive communication between the multiple switch chips.
17. The method of claim 16 , wherein the array of switch chips is two-dimensional so that corners of alternately oriented (face-up and face-down) switch chips overlap.
18. The method of claim 17 , wherein the multiple switch chips in the array are permanently or removably attached to one or more Micro-Electro-Mechanical System (MEMS) jig-plates, which are fabricated to accommodate the multiple switch chips.
19. The method of claim 17 , wherein switch chips on the perimeter of the two-dimensional array of switch chips are configured to communicate with the components in the computer system through the conventional non-capacitive communication mechanisms.
20. The method of claim 15 , wherein the conventional non-capacitive communication mechanisms include:
electrically conductive connections; and
optical communication mechanisms.
21. The method of claim 15 , wherein the components in the computer system include:
processors;
memories;
peripheral devices; and
network interfaces.