High intensity discharge lamp with boost circuit
View Patent ↗A circuit for operating a high intensity discharge (HID) lamp includes an H-bridge connected between a common terminal and a power line, and a control circuit connected to the H-bridge. A boost circuit is connected in parallel with the H-bridge between the power line and the common terminal, where the boost circuit includes a resistor, a Zener diode and a capacitor connected in series.
1. A circuit for operating a high intensity discharge (HID) lamp, comprising:
an H-bridge connected between a common terminal and a power line, said H-bridge having four field effect transistors (FETs), two of said FETs having a first terminal connected to the common terminal, said H-bridge being connected to the HID lamp at second terminals of said two FETs;
a control circuit connected to said H-bridge, said control circuit comprising a transformer having a primary winding connected between the common terminal and a power terminal and a secondary winding connected between the common terminal and said power line; and
a boost circuit connected in parallel with said H-bridge between said power line and the common terminal, said boost circuit comprising a resistor, a Zener diode and a first capacitor connected in series.
2. The circuit of claim 1 , further comprising a second capacitor connected in parallel with said boost circuit between said power line and the common terminal.
3. The circuit of claim 1 , wherein said control circuit comprises a switch connected in series between said primary winding and the common terminal and a further connection connected in parallel with said switch between said primary winding and the common terminal, said further connection having a capacitor and a resistor connected in series.
4. The circuit of claim 1 , further comprising a current sense resistor.
5. The circuit of claim 4 , wherein said current sense resistor is connected in series between said secondary winding and the common terminal, the HID lamp being connected to the common terminal and to said second winding to sense a current across said current sense resistor.
6. The circuit of claim 4 , wherein said current sense resistor is connected in series between the common terminal and said first terminal of said two FETs.