IP Library Granted Patent US 7,384,066
Granted Patent B2
US 7,384,066 · App. 10/986,235 · Granted Jun 10, 2008

Synchronous demodulation with precision track-and-hold circuit

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Quick Facts
Patent No.
US 7,384,066
App. No.
10/986,235
Granted
Jun 10, 2008
Kind
B2
Abstract

A synchronous demodulation circuit uses a digitally controlled track-and-hold circuit to capture the peak amplitude of a rectified signal. A microcontroller controls the track-and-hold circuit. In particular, the microcontroller controls a hold mode of the track-and-hold circuit to capture the peak amplitude of the rectified signal.

Claims (72)

1. A synchronous demodulation circuit arrangement comprising:

a sensor interface circuit coupled to receive a sensor signal, the sensor interface circuit associated with a propagation delay;

a microcontroller configured to generate a microcontroller timing signal and to adjust timing of the microcontroller timing signal as a function of the propagation delay; and

a track-and-hold circuit arrangement coupled to receive the sensor signal and responsive to the microcontroller timing signal, the track-and-hold circuit arrangement configured to periodically sample the sensor signal;

wherein the microcontroller is configured to detect a peak amplitude of the sensor signal and generate a hold control signal in response to the detected peak amplitude and the track-and-hold circuit arrangement is configured to output a peak indication signal in response to the hold control signal.

2. The synchronous demodulation circuit arrangement of claim 1 , wherein the sensor interface circuit is configured to process the sensor signal before the sensor signal is sampled by the track-and-hold circuit arrangement.

3. The synchronous demodulation circuit arrangement of claim 1 , wherein the sensor interface circuit comprises at least one of a rectifier arrangement, an amplifier, and a bandpass filter.

4. The synchronous demodulation circuit arrangement of claim 1 , wherein the track-and-hold circuit arrangement comprises a plurality of switches.

5. The synchronous demodulation circuit arrangement of claim 4 , wherein the switches comprise MOSFET analog switches.

6. The synchronous demodulation circuit arrangement of claim 4 , wherein the track-and-hold circuit arrangement further comprises a hold capacitor.

7. The synchronous demodulation circuit arrangement of claim 1 , wherein the microcontroller is configured to

command the track-and-hold circuit to sample a sensor drive clock signal at predetermined time intervals;

detect a peak amplitude of the sensor drive clock signal; and

adjust timing of the microcontroller timing signal in response to detecting the peak amplitude of the sensor drive clock signal.

8. The synchronous demodulation circuit arrangement of claim 1 , wherein the microcontroller comprises a memory configured to store data for adjusting the timing of the microcontroller timing signal.

9. An occupant detection system comprising:

a sensor configured to generate a sensor signal in response to sensing a vehicle occupant;

a sensor interface circuit coupled to receive the sensor signal, the sensor interface circuit associated with a propagation delay;

a microcontroller configured to generate a microcontroller timing signal and to adjust timing of the microcontroller timing signal as a function of the propagation delay; and

a track-and-hold circuit arrangement coupled to receive the sensor signal and responsive to the microcontroller timing signal, the track-and-hold circuit arrangement configured to periodically sample the sensor signal;

wherein the microcontroller is configured to detect a peak amplitude of the sensor signal and generate a hold control signal in response to the detected peak amplitude and the track-and-hold circuit arrangement is configured to output a peak indication signal in response to the hold control signal.

10. The occupant detection system of claim 9 , wherein the sensor interface circuit is configured to process the sensor signal before the sensor signal is sampled by the track-and-hold circuit arrangement.

11. The occupant detection system of claim 9 , wherein the sensor interface circuit comprises at least one of a rectifier arrangement, an amplifier, and a bandpass filter.

12. The occupant detection system of claim 9 , wherein the track-and-hold circuit arrangement comprises a plurality of MOSFET analog switches.

13. The occupant detection system of claim 12 , wherein the track-and-hold circuit arrangement further comprises a hold capacitor.

14. The occupant detection system of claim 9 , wherein the microcontroller is configured to:

command the track-and-hold circuit to sample a sensor drive clock signal at predetermined time intervals;

detect a peak amplitude of the sensor drive clock signal; and

adjust timing of the microcontroller timing signal in response to detecting the peak amplitude of the sensor drive clock signal.

15. The occupant detection system of claim 9 , wherein the microcontroller comprises a memory configured to store data for adjusting the timing of the microcontroller timing signal.

16. The occupant detection system of claim 9 , wherein the sensor signal comprises an alternating current signal.

17. The occupant detection system of claim 9 , wherein the sensor comprises at least one of an infrared sensor and a linear variable differential transformer.

18. A method to demodulate a signal received via an interface circuit, the method comprising:

synchronizing a microcontroller to a drive signal at least in part by detecting an edge of the drive signal;

adjusting a microcontroller timing signal as a function of a propagation delay of the interface circuit;

detecting a peak amplitude of the signal received via the interface circuit;

in response to detecting the peak amplitude, generating a hold control signal as a function of the adjusted microcontroller timing signal; and

generating a peak indication signal in response to the hold control signal.

19. The method of claim 18 , wherein the hold control signal is generated while an amplitude of the signal received via the interface circuit is within 1% of the peak amplitude.

20. The method of claim 18 , further comprising compensating for an offset voltage.

21. The method of claim 18 , further comprising:

sampling a drive clock signal at predetermined time intervals;

detecting a peak amplitude of the drive clock signal; and

adjusting the microcontroller timing signal in response to detecting the peak amplitude of the drive clock signal.

22. A method to detect a vehicle occupant, the method comprising:

generating a sensor signal in response to sensing a vehicle occupant;

providing the sensor signal to a demodulation circuit arrangement via an interface circuit;

synchronizing a microcontroller to a sensor drive signal at least in part by detecting an edge of the sensor drive signal;

adjusting a microcontroller timing signal as a function of a propagation delay of the interface circuit;

detecting a peak amplitude of the sensor signal;

in response to detecting the peak amplitude, generating a hold control signal as a function of the adjusted microcontroller timing signal; and

generating a peak indication signal in response to the hold control signal.

23. The method of claim 22 , wherein the hold control signal is generated while an amplitude of the sensor signal is within 1% of the peak amplitude of the sensor signal.

24. The method of claim 22 , further comprising compensating for an offset voltage.

25. The method of claim 22 , further comprising:

sampling a sensor drive clock signal at predetermined time intervals;

detecting a peak amplitude of the sensor drive clock signal; and

adjusting the microcontroller timing signal in response to detecting the peak amplitude of the sensor drive clock signal.

26. The method of claim 22 , wherein the sensor signal comprises an alternating current signal.

27. The method of claim 22 , wherein the sensor signal is generated by an infrared sensor.

28. The method of claim 22 , wherein the sensor signal is generated by a sensor comprising a linear variable differential transformer.

29. A microcontroller-readable medium having microcontroller-executable instructions that, when executed by a microcontroller, cause the microcontroller to:

synchronize the microcontroller to a drive signal at least in part by detecting an edge of the drive signal;

adjust a microcontroller timing signal as a function of a propagation delay of an interface circuit;

detect a peak amplitude of a signal received via the interface circuit; and

in response to detecting the peak amplitude, generate a hold control signal as a function of the adjusted microcontroller timing signal.

30. The microcontroller-readable medium of claim 29 , wherein the hold control signal is generated while an amplitude of the signal received via the interface circuit is within 1% of the peak amplitude.

31. The microcontroller-readable medium of claim 29 , further having microcontroller-executable instructions that, when executed by the microcontroller, cause the microcontroller to generate a null control signal.

32. The microcontroller-readable medium of claim 29 , further having microcontroller-executable instructions that, when executed by the microcontroller, cause the microcontroller to:

sample a drive clock signal at predetermined time intervals;

detect a peak amplitude of the drive clock signal; and

adjust the microcontroller timing signal in response to detecting the peak amplitude of the drive clock signal.

Assignments (3)
CHANGE OF NAME Recorded Sep 18, 2024
From: DELPHI TECHNOLOGIES IP LIMITED
To: BORGWARNER US TECHNOLOGIES LLC
Reel/Frame 068985/0968 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2018
From: DELPHI TECHNOLOGIES, INC.
To: DELPHI TECHNOLOGIES IP LIMITED
Reel/Frame 045127/0546 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2004
From: GRIFFIN, DENNIS P.; NOLAND, GEORGE J.; FULTZ, WILLLIAM, W.
To: DELPHI TECHNOLOGIES, INC.
Reel/Frame 015986/0897 →