IP Library Granted Patent US 7,306,997
Granted Patent B2
US 7,306,997 · App. 10/986,399 · Granted Dec 11, 2007

Strained fully depleted silicon on insulator semiconductor device and manufacturing method therefor

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Quick Facts
Patent No.
US 7,306,997
App. No.
10/986,399
Granted
Dec 11, 2007
Kind
B2
Abstract

A semiconductor substrate is provided having an insulator thereon with a semiconductor layer on the insulator. A deep trench isolation is formed, introducing strain to the semiconductor layer. A gate dielectric and a gate are formed on the semiconductor layer. A spacer is formed around the gate, and the semiconductor layer and the insulator are removed outside the spacer. Recessed source/drain are formed outside the spacer.

Claims (27)

1. A method for manufacturing a semiconductor device comprising:

providing a semiconductor substrate having an insulator thereon with a semiconductor layer on the insulator;

forming a deep trench isolation, introducing strain to the semiconductor layer;

forming a gate dielectric and a gate on the semiconductor layer;

forming a spacer around the gate;

removing the semiconductor layer and the insulator outside the spacer;

forming recessed source/drain outside the spacer;

removing the spacer;

removing the deep trench isolation, leaving a trench; and

depositing a layer in the trench, over the recessed source/drain, and over the gate, introducing strain to the semiconductor layer.

2. The method of claim 1 wherein forming recessed source/drain outside the spacer further comprises forming recessed source/drain by selective epitaxial growth outside the spacer.

3. The method of claim 1 wherein forming recessed source/drain outside the spacer further comprises forming recessed carbon doped silicon source/drain outside the spacer, introducing strain to the semiconductor layer.

4. The method of claim 1 wherein forming recessed source/drain outside the spacer further comprises forming recessed silicon germanium source/drain outside the spacer, introducing strain to the semiconductor layer.

5. A method for manufacturing a semiconductor device comprising:

providing a silicon substrate having a buried oxide layer insulator thereon and a silicon layer on the insulator;

forming a deep trench isolation, introducing strain to the silicon layer;

forming a gate dielectric and a gate on the silicon layer;

forming a liner around the gate and on the silicon layer;

forming a spacer on the liner around the gate;

removing the silicon layer, and the insulator to expose the surface of the silicon substrate outside the spacer;

forming recessed source/drain through selective epitaxial growth outside the spacer;

removing the spacer;

removing the deep trench isolation, leaving a trench; and

depositing a contact etch stop layer in the trench and over the recessed source/drain, the liner, and the gate, introducing strain to the silicon layer.

6. The method of claim 5 wherein forming recessed source/drain through selective epitaxial growth outside the spacer further comprises forming recessed source/drain through selective epitaxial growth on the surface of the silicon substrate outside the spacer.

7. The method of claim 5 wherein forming recessed source/drain through selective epitaxial growth outside the spacer further comprises forming recessed carbon doped silicon source/drain through selective epitaxial growth outside the spacer, introducing strain to the silicon layer.

8. The method of claim 5 wherein forming recessed source/drain through selective epitaxial growth outside the spacer further comprises forming recessed silicon germanium source/drain through selective epitaxial growth outside the spacer, introducing strain to the silicon layer.

Assignments (1)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →