IP Library Granted Patent US 7,659,547
Granted Patent B2
US 7,659,547 · App. 10/991,499 · Granted Feb 9, 2010

LED array

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Quick Facts
Patent No.
US 7,659,547
App. No.
10/991,499
Granted
Feb 9, 2010
Kind
B2
Abstract

An illuminator ( 1 ) has bare semiconductor die light emitting diodes ( 7 ) on pads ( 11 ) of Ag/Ni/Ti material. A Si wafer ( 13 ) has a rough upper surface, and this roughness is carried through an oxide layer ( 12 ) and the pads ( 11 ) to provide a rough but reflective upper surface of the pads ( 11 ), thus forming a diffuser. Epoxy encapsulant ( 9 ) is deposited in a layer over the diodes ( 7 ) and the pads ( 11 ), and it is index matched with a top diffuser plate ( 8 ) of opal glass.

Claims (17)

1. An illuminator comprising:

a substrate;

an array of pre-formed LED semiconductor diodes comprising an inorganic semiconductor material placed on the substrate;

a layer of encapsulant over the array of diodes and the substrate;

a lower diffuser comprising a rough, reflective upper surface of the substrate that is between the placed diodes;

an upper diffuser arranged above the layer of encapsulant, wherein the upper diffuser and the layer of encapsulant are index matched;

wherein the substrate comprises a Si layer having a rough upper surface, an Si02 oxide on the Si layer upper surface and having a rough upper surface, and at least one metal layer over the Si02 oxide layer and having a rough upper surface; and

wherein the substrate comprises conductive pads on which the diodes are placed.

2. The illuminator as claimed in claim 1 , wherein the upper diffuser is mounted on the encapsulant.

3. The illuminator as claimed in claim 2 , wherein the upper diffuser comprises an opal glass diffuser plate.

4. The illuminator of claim 1 , wherein the substrate comprises conductive pads on which the diodes are placed.

5. The illuminator as claimed in claim 4 , wherein the metal is Ag.

6. An illuminator as claimed in claim 5 , wherein the Ag is a layer over layers of Ni and Ti.

7. The illuminator as claimed in claim 4 , wherein the ratio of the footprint of the diodes to that of the pads is equal to or less than approximately 1:50.

8. The illuminator as claimed in claim 4 , wherein the pads are of rectangular shape in plan.

9. The illuminator as claimed in claim 8 , wherein there is a two-dimensional array of pads, and the diodes are connected in series along lines of the array between end rails.

10. The illuminator as claimed in claim 9 , wherein alternate lines of diodes are located at opposed ends of their pads.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Feb 8, 2023
From: SILICON VALLEY BANK
To: PHOSEON TECHNOLOGY, INC.
Reel/Frame 062687/0618 →
SECURITY INTEREST Recorded Jan 13, 2017
From: PHOSEON TECHNOLOGY, INC.
To: SILICON VALLEY BANK
Reel/Frame 041365/0727 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE FROM ASSIGNMENT TO SECURITY AGREEMENT PREVIOUSLY RECORDED ON REEL 026504 FRAME 0270. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF THE SECURITY INTEREST. Recorded Aug 14, 2012
From: PHOSEON TECHNOLOGY, INC.
To: SILICON VALLEY BANK
Reel/Frame 028782/0457 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2011
From: PHOSEON TECHNOLOGY, INC.
To: SILICON VALLEY BANK
Reel/Frame 026504/0270 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2007
From: APPLIED OPTOTECH LIMITED
To: PHOSEON TECHNOLOGY, INC.
Reel/Frame 019810/0869 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2004
From: BRADDELL, JULES; KAVANAGH, KIERAN
To: APPLIED OPTOTECH LIMITED
Reel/Frame 016013/0144 →