Thin film panel having particular pixel electrodes overlapping particular data line portions
View Patent ↗A thin film panel is provided, which includes: a substrate; a first signal line formed on the substrate; a second signal line that intersects the first signal line and includes first and second portions being substantially rectilinear and disposed on different straight lines and a connection connected to the first and the second portions; and first and second pixel electrodes disposed adjacent to the second signal line and overlapping the first and the second portions of the second signal line, respectively.
1. A thin film panel comprising:
a substrate;
a first signal line formed on the substrate;
a second signal line that intersects the first signal line and includes first and second portions being substantially rectilinear and disposed on different straight lines and a connection connected to the first and the second portions; and
first and second pixel electrodes disposed adjacent to the second signal line and overlapping the first and the second portions of the second signal line, respectively.
2. The thin film panel of claim 1 , wherein the first and the second portions of the second signal line fully overlap the first and the second pixel electrodes, respectively.
3. The thin film panel of claim 1 , wherein each of the first and the second pixel electrodes has a cutout.
4. The thin film panel of claim 1 , further comprising a fourth signal line separated from the first and the second signal lines and overlapping the first and the second pixel electrodes with interposing an insulator to form a storage capacitor.
5. The thin film panel of claim 4 , wherein the fourth signal line comprises a curved branch overlapping the first pixel electrode.
6. The thin film panel of claim 5 , wherein the curved branch of the fourth signal line is curved near the connection of the second signal line.
7. The thin film panel of claim 6 , wherein the curved branch of the fourth signal line comprises first and second portions being substantially rectilinear and disposed on different straight lines and a connection connected to the first and the second portions.
8. The thin film panel of claim 7 , wherein the first and the second portions of the curved branch of the fourth signal line are disposed near edges of the first pixel electrode and the connection of the curved branch of the fourth signal line substantially passes through the first pixel electrode.
9. The thin film panel of claim 1 , further comprising:
a first insulator disposed on the first signal line; and
a second insulator disposed between the second line and the first and the second pixel electrodes.
10. The thin film panel of claim 9 , further comprising:
a gate electrode disposed on the substrate and connected to the first signal line;
a semiconductor layer disposed on the first insulating layer;
a source electrode disposed at least on the semiconductor layer and connected to the second signal line; and
a drain electrode that is disposed at least on the semiconductor layer, separated from the source electrode, and connected to one of the first and the second pixel electrodes.
11. The thin film panel of claim 10 , wherein the semiconductor layer includes a portion disposed under the second signal line.
12. The thin film panel of claim 11 , wherein the portion of the semiconductor layer disposed under the second signal line has substantially the same planar shape as the second signal line.
13. A thin film panel comprising:
a substrate;
a first signal line formed on the substrate;
second and third signal lines intersecting the first signal line, each of the second and the third signal lines including first and second portions being substantially rectilinear and disposed on different straight lines and a connection connected to the first and the second portions; and
a pixel electrode disposed substantially between the second signal line and the third signal line and overlapping the first portion of the second signal line and the second portion of the third signal line.
14. The thin film panel of claim 13 , wherein the pixel electrode fully covers the first portion of the second signal line and the second portion of the third signal line.
15. The thin film panel of claim 14 , wherein the pixel electrode has a cutout.
16. The thin film panel of claim 13 , further comprising a fourth signal line separated from the first to the third signal lines and overlapping the pixel electrode with interposing an insulator to form a storage capacitor.
17. The thin film panel of claim 16 , wherein the fourth signal line is curved near the connections of the second and the third signal lines.
18. The thin film panel of claim 17 , wherein the fourth signal line comprises first and second portions being substantially rectilinear and disposed on different straight lines and a connection connected to the first and the second portions.
19. The thin film panel of claim 18 , wherein the first portion of the fourth signal line is disposed near the first portion of the second signal line and the second portion of the fourth signal line is disposed near the second portion of the third signal line.
20. The thin film panel of claim 13 , further comprising a thin film transistor connected to the pixel electrode and one of the second and the third signal lines.