Insulated gate bipolar transistor having a reduced tail current and method of fabricating the same
View Patent ↗An IGBT has an N-type buffer region between a P-type collector region and a P-type base region. The buffer region includes arsenic as a N-type impurity. The buffer region is formed to have a relatively high impurity concentration of equal to or greater than 5×1017 cm-3 and a relatively small thickness of 2 to 10 μm.
1. An insulated gate bipolar transistor comprising:
a P-type collector region;
an N-type buffer region which is formed on said P-type collector region;
an N-type base region which is formed on said N-type buffer region and has an impurity concentration lower than that of said N-type buffer region;
a P-type base region which is formed in a surface region of said N-type base region; and
an N-type emitter region which is formed in a surface region of said P-type base region,
wherein said N-type buffer region includes arsenic as an N-type impurity at an impurity concentration of equal to or greater than 5× 17 cm −3 , and has a thickness of 2 μm to 10 μm, and
wherein an impurity concentration of the N-type impurity in said N-type buffer region is higher than an impurity concentration of a P-type impurity in said P-type collector region.
2. The insulated gate bipolar transistor according to claim 1 , wherein said N-type buffer region is not subjected to electron irradiation.
3. The insulated gate bipolar transistor according to claim 1 , wherein said N-type buffer region is constituted by an epitaxial growth layer.
4. A method of fabricating an insulated gate bipolar transistor having a P-type collector region, an N-type buffer region which is formed on said P-type collector region, an N-type base region which is formed on said N-type buffer region and has an impurity concentration lower than that of said N-type buffer region, a P-type base region which is formed in a surface region of said N-type base region, and an N-type emitter region which is formed in a surface region of said P-type base region,
wherein said N-type buffer region is formed by diffusing arsenic, as an N-type impurity, at an impurity concentration of equal to or greater than 5×10 17 cm −3 , and in such a way that said region has a thickness of 2 μm to 10 μm.
wherein an impurity concentration of the N-type impurity in said N-type buffer region is made higher than an impurity concentration of a P-type impurity in said P-type collector region.
5. The method of fabricating the insulated gate bipolar transistor according to claim 4 , wherein said N-type buffer region is formed by epitaxial growth.
6. The method of fabricating the insulated gate bipolar transistor according to claim 5 , wherein said N-type buffer region is not subjected to electron irradiation.