Overcurrent protection circuit
View Patent ↗An overcurrent protection circuit has an output voltage detection resistor for detecting an output voltage. A foldback overcurrent protection circuit detects an output current flowing through an output transistor and controls the output current flowing through the output transistor in accordance with the detected output current. A first logic generating circuit receives an overcurrent detection signal from the foldback overcurrent protection circuit corresponding to the detected output current. A second logic generating circuit receives a detection signal from the output voltage detection resistor corresponding to a decrease in the detected output voltage. An AND circuit receives and processes an overcurrent delay signal generated by the first logic generating circuit and a voltage detection signal generated by the second logic generating circuit. A negative voltage generating circuit receives an output from the AND circuit and outputs a negative voltage to the foldback overcurrent protection circuit to control the output current flowing through the output transistor.
1. An overcurrent protection circuit for detecting an output current flowing through an output transistor, the overcurrent protection circuit comprising:
an output voltage detection resistor for detecting an output voltage;
a foldback overcurrent protection circuit for detecting an output current flowing through an output transistor and for controlling the output current flowing through the output transistor in accordance with the detected output current;
a first logic generating circuit for receiving an overcurrent detection signal from the foldback overcurrent protection circuit corresponding to the detected output current;
a second logic generating circuit for receiving a detection signal from the output voltage detection resistor corresponding to a decrease in the detected output voltage;
an AND circuit for receiving and processing an overcurrent delay signal generated by the first logic generating circuit and a voltage detection signal generated by the second logic generating circuit; and
a negative voltage generating circuit for receiving an output from the AND circuit and outputting a negative voltage to the foldback overcurrent protection circuit to control the flow of output current flowing through the output transistor.
2. An overcurrent protection circuit according to claim 1 ; wherein the foldback overcurrent protection circuit starts to control the output current flowing through the output transistor when the detected output current reaches a predetermined value.
3. An overcurrent protection circuit according to claim 2 ; wherein the predetermined value of the output current is set in the foldback overcurrent protection circuit.
4. An overcurrent protection circuit according to claim 2 ; wherein after the foldback overcurrent protection circuit starts to control the output current flowing through the output transistor, the foldback overcurrent protection circuit detects a constantly flowing overcurrent from the output current flowing through the output transistor so that the first logic generating circuit generates the overcurrent delay signal by applying a predetermined time delay to the overcurrent detection signal.
5. An overcurrent protection circuit according to claim 2 ; wherein the second logic generating circuit generates the voltage detection signal when the foldback overcurrent protection circuit controls the output current to lower the output voltage detected by the output voltage detection resistor to a preselected output voltage.
6. In a voltage regulator having a depletion mode output transistor, an overcurrent protection circuit for controlling an output current flowing through the depletion mode output transistor, the overcurrent protection circuit comprising:
an output voltage detection resistor for detecting an output voltage of the voltage regulator;
a foldback overcurrent protection circuit for detecting an output current flowing through the depletion mode output transistor and for controlling the output current flowing through the depletion mode output transistor in accordance with the detected output current;
a first logic generating circuit for receiving an overcurrent detection signal from the foldback overcurrent protection circuit corresponding to the detected output current level;
a second logic generating circuit for receiving a detection signal from the output voltage detection resistor corresponding to a decrease in the detected output voltage;
an AND circuit for receiving and processing an overcurrent delay signal generated by the first logic generating circuit and a voltage detection signal generated by the second logic generating circuit; and
a negative voltage generating circuit for receiving an output from the AND circuit and outputting a negative voltage to the foldback overcurrent protection circuit to control the output current flowing through the depletion mode output transistor.
7. A voltage regulator according to claim 6 ; wherein the foldback overcurrent protection circuit starts to control the output current flowing through the depletion mode output transistor when the detected output current reaches a predetermined value.
8. A voltage regulator according to claim 7 ; wherein the predetermined value of the output current is set in the foldback overcurrent protection circuit.
9. A voltage regulator according to claim 7 ; wherein after the foldback overcurrent protection circuit starts to control the output current flowing through the depletion mode output transistor, the foldback overcurrent protection circuit detects a constantly flowing overcurrent from the output current flowing through the depletion mode output transistor so that the first logic generating circuit generates the overcurrent delay signal by applying a predetermined time delay to the overcurrent detection signal.
10. A voltage regulator according to claim 7 ; wherein the second logic generating circuit generates the voltage detection signal when the foldback overcurrent protection circuit controls the output current flowing through the depletion mode output transistor to lower the output voltage detected by the output voltage detection resistor to a preselected output voltage.