IP Library Patent Application 10996890
Patent Application
App. No. 10/996,890

Method of transporting a PCI express packet over a VMEbus network

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Quick Facts
Patent No.
US None
App. No.
10/996,890
Abstract

A method of transporting a PCI Express packet ( 135 ) from an initiator PCI Express domain ( 102 ) over a VMEbus network ( 110 ) to a receiver PCI Express domain ( 104 ), can include the initiator PCI Express domain creating the PCI Express packet, while a PCI Express-to-VMEbus encapsulation module ( 103 ) reads a first PCI Express destination address ( 250 ) of the PCI Express packet. The first PCI Express destination address is mapped to a receiver PCI Express domain VMEbus address ( 242 ). The PCI Express packet is encapsulated in a data field ( 282 ) of a VMEbus write transaction ( 236 ) by the PCI Express-to-VMEbus encapsulation module. The VMEbus write transaction is communicated to the receiver PCI Express domain over the VMEbus network.

Claims (55)

1 . In a computer network, a method of transporting a PCI Express packet from an initiator PCI Express domain over a VMEbus network to a receiver PCI Express domain, comprising:

the initiator PCI Express domain creating the PCI Express packet;

reading a first PCI Express destination address of the PCI Express packet;

mapping the first PCI Express destination address to a receiver PCI Express domain VMEbus address;

encapsulating the PCI Express packet in a data field of a VMEbus write transaction; and

communicating the VMEbus write transaction to the receiver PCI Express domain over the VMEbus network.

2 . The method of claim 1 , further comprising:

the receiver PCI Express domain deciding to claim the VMEbus write transaction;

the receiver PCI Express domain de-encapsulating the PCI Express packet from the data field of the VMEbus write transaction; and

issuing the PCI Express packet to a PCI Express computing element.

3 . The method of claim 2 , wherein deciding to claim the VMEbus write transaction comprises reading a VMEbus-to-PCI Express map.

4 . The method of claim 2 , further comprising:

mapping the receiver PCI Express domain VMEbus address to a second PCI Express destination address; and

placing the second PCI Express destination address in a header portion of the PCI Express packet.

5 . The method of claim 4 , wherein the first PCI Express destination address is identical to the second PCI Express destination address.

6 . The method of claim 4 , wherein the first PCI Express destination address is different than the second PCI Express destination address.

7 . The method of claim 1 , further comprising placing the receiver PCI Express domain VMEbus address into an address field of the VMEbus write transaction.

8 . A PCI Express domain, comprising:

a PCI Express network; and

a PCI Express-to-VMEbus encapsulation module coupled to the PCI Express network, wherein the PCI Express-to-VMEbus encapsulation module couples the PCI Express domain to an VMEbus network, wherein the PCI Express-to-VMEbus encapsulation module is coupled to map a PCI Express destination address to a receiver PCI Express domain VMEbus address, and wherein the PCI Express-to-VMEbus encapsulation module is coupled to encapsulate a PCI Express packet into a data field of a VMEbus write transaction.

9 . The PCI Express domain of claim 8 , wherein the PCI Express-to-VMEbus encapsulation module is coupled to communicate the VMEbus write transaction to a receiver PCI Express domain over the VMEbus network.

10 . A PCI Express domain, comprising:

a PCI Express network having at least one PCI Express computing element; and

a PCI Express-to-VMEbus encapsulation module coupled to the PCI Express network, wherein the PCI Express-to-VMEbus encapsulation module couples the PCI Express domain to an VMEbus network, wherein the PCI Express-to-VMEbus encapsulation module reads a VMEbus-to-PCI Express map to claim a VMEbus write transaction from the VMEbus network, wherein the PCI Express-to-VMEbus encapsulation module de-encapsulates a PCI Express packet from a data field of the VMEbus write transaction, and wherein the PCI Express-to-VMEbus encapsulation module issues the PCI Express packet on the PCI Express network.

11 . The PCI Express domain of claim 10 , wherein the PCI Express-to-VMEbus encapsulation module maps a VMEbus address to a PCI Express destination address.

12 . The PCI Express domain of claim 10 , wherein the PCI Express-to-VMEbus encapsulation module places the PCI Express destination address in a header portion of the PCI Express packet.

13 . In a PCI Express domain, a method of communicating a PCI Express packet over a VMEbus network, comprising:

creating the PCI Express packet;

reading a first PCI Express destination address of the PCI Express packet;

mapping the first PCI Express destination address to a receiver PCI Express domain VMEbus address;

encapsulating the PCI Express packet in a data field of a VMEbus write transaction; and

communicating the VMEbus write transaction to a receiver PCI Express domain over the VMEbus network.

14 . The PCI Express domain of claim 13 , further comprising placing the receiver PCI Express domain VMEbus address into an address field of the VMEbus write transaction.

15 . In a PCI Express domain, a method of communicating a PCI Express packet over a VMEbus network, comprising:

the PCI Express domain deciding to claim a VMEbus write transaction from the VMEbus network;

de-encapsulating the PCI Express packet from a data field of the VMEbus write transaction; and

issuing the PCI Express packet to a PCI Express computing element having a PCI Express destination address.

16 . The PCI Express domain of claim 15 , wherein deciding to claim the VMEbus write transaction comprises reading a VMEbus-to-PCI Express map.

17 . A computer-readable medium containing computer instructions for instructing a processor to perform a method of transporting a PCI Express packet from an initiator PCI Express domain over a VMEbus network to a receiver PCI Express domain, the instructions comprising:

the initiator PCI Express domain creating the PCI Express packet;

reading a first PCI Express destination address of the PCI Express packet;

mapping the first PCI Express destination address to a receiver PCI Express domain VMEbus address;

encapsulating the PCI Express packet in a data field of a VMEbus write transaction; and

communicating the VMEbus write transaction to the receiver PCI Express domain over the VMEbus network.

18 . The computer-readable medium of claim 17 , further comprising:

the receiver PCI Express domain deciding to claim the VMEbus write transaction;

the receiver PCI Express domain de-encapsulating the PCI Express packet from the data field of the VMEbus write transaction; and

issuing the PCI Express packet to a PCI Express computing element.

19 . The computer-readable medium of claim 18 , wherein deciding to claim the VMEbus write transaction comprises reading a VMEbus-to-PCI Express map.

20 . The computer-readable medium of claim 18 , further comprising:

mapping the receiver PCI Express domain VMEbus address to a second PCI Express destination address; and

placing the second PCI Express destination address in a header portion of the PCI Express packet.

21 . The computer-readable medium of claim 20 , wherein the first PCI Express destination address is identical to the second PCI Express destination address.

22 . The computer-readable medium of claim 20 , wherein the first PCI Express destination address is different than the second PCI Express destination address.

23 . The computer-readable medium of claim 18 , further comprising placing the receiver PCI Express domain VMEbus address into an address field of the VMEbus write transaction.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2008
From: MOTOROLA, INC.
To: EMERSON NETWORK POWER - EMBEDDED COMPUTING, INC.
Reel/Frame 020540/0714 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 28, 2004
From: SANDY, DOUGLAS L.; HARRIS, JEFFREY M.; TUFFORD, ROBERT C.
To: MOTOROLA, INC.
Reel/Frame 016030/0302 →