IP Library Granted Patent US 7,634,773
Granted Patent B2
US 7,634,773 · App. 10/997,571 · Granted Dec 15, 2009

Method and apparatus for thread scheduling on multiple processors

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Quick Facts
Patent No.
US 7,634,773
App. No.
10/997,571
Granted
Dec 15, 2009
Kind
B2
Abstract

One embodiment disclosed relates to a method of distributing threads to processors of a multiprocessor computer system. Prior to assigning a thread at a current position in a thread list to a current processor number, a determination is made as to whether the thread is to be moved to a later position in the thread list. If the determination is made that the thread is to be moved, then the thread is moved to the later position in the thread list. On the other hand, if the determination is made that the thread is not to be moved, then the thread is assigned to the current processor number. Other embodiments are also disclosed.

Claims (35)

1. A method of distributing threads to processors of a multiprocessor computer system, the method comprising:

prior to assigning a thread at a current position in a thread list to a current processor number, using a random number to determine whether the thread is to be moved to a later position in the thread list;

responsive to determining that the thread is to be moved, then moving the thread to the later position in the thread list; and

responsive to determining that the thread is not to be moved, then assigning the thread to the current processor number.

2. The method of claim 1 , wherein the later position comprises an end position in the thread list.

3. The method of claim 1 , further comprising:

responsive to assigning the thread to the current processor, incrementing the current position in the thread list and the current processor number.

4. The method of claim 3 , wherein incrementing the current processor number comprises looping back to a first processor number when a last processor number is passed.

5. The method of claim 3 , wherein the current position is initially located at the beginning of the thread list.

6. The method of claim 5 , wherein, if a last position in the thread list is reached, then the thread at the last position is assigned to the current processor number without determining whether the thread is to be moved.

7. The method of claim 3 , further comprising:

repeating the method until all the threads in the thread list have been assigned.

8. The method of claim 1 , further comprising:

grabbing a write lock on the thread list when the determination is made that the thread is to be moved; and

releasing the write lock on the thread list after the thread has been moved to the later position in the thread list.

9. The method of claim 8 , wherein the move is skipped if the write lock is unavailable.

10. The method of claim 9 , wherein a history of skipped moves is tracked and used to determine whether to disallow future skipped moves.

11. The method of claim 1 , wherein there is a set probability for determining that the thread is to be moved.

12. The method of claim 1 , wherein a probability for determining that the thread is to be moved is configurable by a user.

13. The method of claim 1 , wherein a probability for determining that the thread is to be moved depends on a current length of the thread list.

14. The method of claim 1 , wherein a probability for determining that the thread is to be moved depends on a current length of a thread groups list.

15. The method of claim 1 , wherein a probability for determining that the thread is to be moved depends on a previous history of thread distribution among the processors.

16. The method of claim 1 , further comprising:

using the random number in the determination such that a probability that the thread is to be moved depends on a previous history of thread distribution among the processors.

17. A computer system comprising:

a plurality of microprocessors; and an operating system configured to periodically distribute program threads from an active thread list to said microprocessors for execution thereof wherein the operating system is further configured such that, while walking through the active thread list, randomly-generated numbers are used to select a portion of the threads to be moved to a later position in the list instead of being assigned to one of the microprocessors.

18. The computer system of claim 17 , wherein the later position comprises an end position in the list.

19. The computer system of claim 17 , wherein the determination of which threads to be moved is made such that there is a predetermined chance for the move.

20. The computer system of claim 14 , wherein the operating system is further configured to randomly select the portion of the threads such that a probability of moving depends on a previous history of thread distribution among the microprocessors.

21. A computer program product comprising program instructions, embodied on a computer-readable medium, that are operable to cause a programmable processor to distribute threads to processors of a multiprocessor computer system, the program instructions comprising:

computer-executable code configured to walk a current position through a thread list; and

computer-executable code configured to generate a random number used to make a determination as to whether a thread at the current position is to be moved to a later position in the thread list instead of assigning the thread to a current processor number that identifies one of the processors.

22. The computer program product of claim 21 , wherein the later position comprises an end position in the list.

23. The computer program product of claim 21 , wherein the random determination as to whether the thread is to be moved is made such that there is a predetermined chance that the move is made.

24. The computer program product of claim 21 , wherein the computer-executable code is further configured to make the random determination such that a probability of moving depends on a previous history of thread distribution among the processors.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2021
From: OT PATENT ESCROW, LLC
To: VALTRUS INNOVATIONS LIMITED
Reel/Frame 058897/0262 →
PATENT ASSIGNMENT, SECURITY INTEREST, AND LIEN AGREEMENT Recorded Jan 26, 2021
From: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP; HEWLETT PACKARD ENTERPRISE COMPANY
To: OT PATENT ESCROW, LLC
Reel/Frame 055269/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2015
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 037079/0001 →