IP Library Patent Application 10998152
Patent Application
App. No. 10/998,152

Multiprocessor system, processor device

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Quick Facts
Patent No.
US None
App. No.
10/998,152
Abstract

In the initialization of a multiprocessor system, device history information containing mounting position information indicating a mounting position of a CPU board supplied from a history information supplying unit is stored in a nonvolatile storage unit in the CPU board capable of storing plural pieces of device history information, so that the mounting position information on each of CPU boards can be accurately and automatically recorded in each CPU board and the history of the mounting position of the CPU board can be recorded and managed on a CPU board by CPU board basis.

Claims (21)

1 . A multiprocessor system composed of plural replaceable processor devices, comprising:

a history information supplying unit supplying device history information containing mounting position information indicating a position where the processor device is mounted in the multiprocessor system to the processor device in initialization of the multiprocessor system; and

a nonvolatile and rewritable storage unit being included in each of the processor devices and storing the device history information supplied from said history information supplying unit,

said storage unit being allowed to store plural pieces of the device history information.

2 . The multiprocessor system according to claim 1 , further comprising:

a comparison unit comparing the mounting position information of the device history information supplied from said history information supplying unit and the mounting position information of up-to-date device history information stored in said storage unit, wherein

when these two pieces of mounting position information are different as a result of the comparison by said comparison unit, the device history information supplied from said history information supplying unit is stored in said storage unit.

3 . The multiprocessor system according to claim 1 , further comprising:

a management unit managing storage order of device history information stored in said storage unit.

4 . The multiprocessor system according to claim 3 , wherein said management unit is a pointer pointing to a storage position of the device history information being up-to-date in said storage unit.

5 . The multiprocessor system according to claim 1 , wherein the device history information contains time information when the device history information is supplied.

6 . The multiprocessor system according to claim 1 , wherein said device history information contains system identification information allowing the multiprocessor system to be uniquely identified.

7 . The multiprocessor system according to claim 1 , wherein the processor device includes plural processors.

8 . A processor device being allowed to be mounted in a multiprocessor system composed of plural replaceable processor devices, comprising:

a history information receiving unit receiving device history information containing mounting position information indicating a position in the multiprocessor system where the processor device is mounted;

a storage unit being allowed to store plural pieces of the device history information and being nonvolatile and rewritable;

a comparison unit comparing the mounting position information of the device history information received by said history information receiving unit and the mounting position information of up-to-date device history information stored in said storage unit, wherein

when these two pieces of mounting position information are different as a result of the comparison by said comparison unit, the device history information received by said history information receiving unit is stored in said storage unit.

9 . The processor device according to claim 8 , further comprising:

a management unit managing storage order of the device history information.

10 . The processor device according to claim 8 , wherein said processor device includes plural processors.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2009
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 022240/0964 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NAME AND ADDRESS OF THE SECOND ASSIGNEE, DOCUMENT PREVIOUSLY RECORDED AT REEL 016313 FRAME 0508. ASSIGNOR CONFIRMS THE ASSIGNMENT. Recorded Dec 16, 2005
From: KUBO, MASAHITO; CHIBA, TAKASHI; KOSEKI, HIROFUMI
To: FUJITSU LIMITED; PFU LIMITED
Reel/Frame 017126/0806 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2005
From: KUBO, MASAHITO; CHIBA, TAKASHI; KOSEKI, HIROFUMI
To: FUJITSU LIMITED; FANUC LTD
Reel/Frame 016313/0508 →