IP Library Granted Patent US 7,446,807
Granted Patent B2
US 7,446,807 · App. 11/002,281 · Granted Nov 4, 2008

Imager pixel with capacitance for boosting reset voltage

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Quick Facts
Patent No.
US 7,446,807
App. No.
11/002,281
Granted
Nov 4, 2008
Kind
B2
Abstract

A pixel cell in which a capacitance is coupled between a storage node and a row select transistor and another capacitance is coupled between a storage node and a voltage supply or ground source potential to boost a reset voltage.

Claims (95)

1. A pixel circuit comprising:

a photo-conversion device;

a floating diffusion region for receiving and storing charge from said photo-conversion device;

a reset transistor for resetting said floating diffusion region to a predetermined reset voltage state;

a first capacitance circuit coupled to said floating diffusion region for storing charge received from said photo-conversion device;

a readout circuit for reading out a signal based on charges stored at said floating diffusion region and said first capacitance circuit; and

a voltage boost circuit operating in response to a switching state of a switching device of said pixel circuit for boosting a reset voltage on said floating diffusion region above said predetermined reset voltage state wherein said voltage boost circuit comprises a second capacitance circuit.

2. The pixel circuit of claim 1 , wherein said voltage boost circuit is coupled between said floating diffusion region and said readout circuit.

3. The pixel circuit of claim 1 , wherein said second capacitance circuit comprises a capacitor.

4. The pixel circuit of claim 1 , further comprising a transfer transistor for delivering said charge from said photo-conversion device to said floating diffusion region.

5. The pixel circuit of claim 1 , further comprising a row select transistor acting as a switching device coupled to said voltage boost circuit.

6. The pixel circuit of claim 1 , further comprising a source follower transistor coupled to said floating diffusion region.

7. The pixel circuit of claim 1 , wherein said photo-conversion device comprises a photodiode.

8. The pixel circuit of claim 1 , wherein said first capacitance circuit is further coupled to a pixel supply voltage.

9. The pixel circuit of claim 1 , wherein said first capacitance circuit is further coupled to a reset supply voltage.

10. The pixel circuit of claim 1 , wherein said first capacitance circuit is further coupled to a ground source potential.

11. A pixel of an imaging device comprising:

a photo-conversion device;

a floating diffusion region for receiving and storing charge from said photo-conversion device;

a reset transistor for resetting said floating diffusion region to a predetermined reset voltage state;

a first capacitor coupled to said floating diffusion region for storing charge received from said photo-conversion device;

a readout circuit for reading out a signal based on charges stored at said floating diffusion region and said first capacitance circuit; and

a second capacitor operating in response to a switching state of a switching device of said pixel circuit for boosting a reset voltage on said floating diffusion region above said predetermined reset voltage state,

said first and second capacitors having a common first electrode and respective second electrodes.

12. The pixel of claim 11 , wherein said first and second capacitors are at least partially formed over a pixel isolated region.

13. A method of fabricating an integrated circuit comprising:

forming a photo-conversion device;

forming a floating diffusion region for receiving and storing charge from said photo-conversion device;

forming a reset transistor for resetting said floating diffusion region to a predetermined reset voltage state;

forming a first capacitance circuit coupled to said floating diffusion region for storing charge received from said photo-conversion device;

forming a readout circuit for reading out a signal based on charges stored at said floating diffusion region and said first capacitance circuit; and

forming a voltage boost circuit operating in response to a switching state of a switching device of said pixel circuit for boosting a reset voltage on said floating diffusion region above said predetermined reset voltage state wherein said step of forming a voltage boost circuit comprises forming a second capacitance circuit.

14. The method of claim 13 , wherein said step of forming a voltage boost circuit comprises coupling said voltage boost circuit to said floating diffusion region and to said readout circuit.

15. The method of claim 13 , wherein step of forming said second capacitance circuit comprises forming a capacitor.

16. The method of claim 13 , further comprising a step of forming a transfer transistor for delivering said charge from said photo-conversion device to said floating diffusion region.

17. The method of claim 13 , further comprising a step of forming a row select transistor coupled to said voltage boost circuit.

18. The method of claim 13 , further comprising a step of forming a source follower transistor coupled to said floating diffusion region.

19. A method of operating a pixel comprising the steps of:

receiving light in a photo-conversion device, said photo-conversion device converting said light into electrical charge;

resetting a floating diffusion region to a predetermined reset voltage state;

boosting a voltage on said floating diffusion region above said predetermined reset voltage state with a capacitance circuit operating in response to a switching state of a switching device;

reading out said boosted reset voltage;

storing charge from said photo-conversion device in said floating diffusion region and in another capacitance circuit coupled to said floating diffusion region; and

reading out a signal based on stored charge at said floating diffusion region from said photo-conversion device.

20. The method of claim 19 , further comprising a step of delivering said charge from said photo-conversion device through a transfer transistor to said floating diffusion region.

21. The method of claim 19 , further comprising operating a row select transistor to generate a boosted voltage at said floating diffusion region.

22. A pixel circuit comprising:

a photo-conversion device;

a floating diffusion region for receiving and storing charge from said photo-conversion device;

a transfer transistor for delivering said charge from said photo-conversion device to said floating diffusion region;

a reset transistor for resetting said floating diffusion region to a predetermined reset voltage state;

a first capacitor coupled to said floating diffusion region for storing charge received from said photo-conversion device;

a source follower transistor coupled to said floating diffusion region for providing pixel output signals;

a row select transistor for selectively operating said source follower transistor; and

a voltage boost circuit operating in response to a switching state of said row select transistor for boosting a reset voltage on said floating diffusion region above said predetermined reset voltage state wherein said voltage boost circuit comprises a second capacitor.

23. The pixel circuit of claim 22 , wherein said voltage boost circuit is coupled between said floating diffusion region and a source of said row select transistor.

24. The pixel circuit of claim 22 , wherein said photo-conversion device comprises a photodiode.

25. A pixel circuit comprising:

a photo-conversion device;

a floating diffusion region for receiving and storing charge from said photo-conversion device;

a transfer transistor coupled between the photo-conversion device and the floating diffusion region for delivering said charge from said photo-conversion device to said floating diffusion region;

a reset transistor for resetting said floating diffusion region to a predetermined reset voltage state;

a first capacitor coupled to said floating diffusion region for storing charge received from said photo-conversion device;

a second capacitor operating in response to a switching state of a switching device of said pixel circuit for boosting a reset voltage on said floating diffusion region above said predetermined reset voltage state;

a row select transistor coupled to said second capacitor; and

a source follower transistor coupled to said second capacitor for reading out a signal based on charges stored at said floating diffusion region and said first capacitor.

26. An imager comprising:

an array of pixel circuits, at least one pixel circuit of said array comprising:

a photo-conversion device;

a floating diffusion region for receiving and storing charge from said photo-conversion device;

a reset transistor for resetting said floating diffusion region to a predetermined reset voltage state;

a first capacitance circuit coupled to said floating diffusion region for storing charge received from said photo-conversion device;

a readout circuit for reading out a signal based on charges stored at said floating diffusion region and said first capacitance circuit; and

a voltage boost circuit operating in response to a switching state of a switching device of said pixel circuit for boosting a reset voltage on said floating diffusion region above said predetermined reset voltage state wherein said voltage boost circuit comprises a second capacitance circuit.

27. The imager of claim 26 , wherein said voltage boost circuit is coupled between said floating diffusion region and said readout circuit.

28. The imager of claim 26 , wherein said second capacitance circuit comprises a capacitor.

29. The imager of claim 26 , further comprising a transfer transistor for delivering said charge from said photo-conversion device to said floating diffusion region.

30. The imager of claim 26 , further comprising a row select transistor coupled to said voltage boost circuit.

31. The imager of claim 26 , further comprising a source follower transistor coupled to said floating diffusion region.

32. The imager of claim 26 , wherein said photo-conversion device comprises a photodiode.

33. A processing system comprising:

a processor; and

an imager electronically coupled to said processor, said imager comprising an array of pixel circuits, at least one pixel circuit of said array comprising:

a photo-conversion device;

a floating diffusion region for receiving and storing charge from said photo-conversion device;

a reset transistor for resetting said floating diffusion region to a predetermined reset voltage state;

a first capacitance circuit coupled to said floating diffusion region for storing charge received from said photo-conversion device;

a readout circuit for reading out a signal based on charges stored at said floating diffusion region and said first capacitance circuit; and

a voltage boost circuit operating in response to a switching state of a switching device of said pixel circuit for boosting a reset voltage on said floating diffusion region above said predetermined reset voltage state wherein said voltage boost circuit comprises a second capacitance circuit.

34. The processing system of claim 33 , wherein said voltage boost circuit is coupled between said floating diffusion region and said readout circuit.

35. The processing system of claim 33 , wherein said second capacitance circuit comprises a capacitor.

36. The processing system of claim 33 , further comprising a transfer transistor for delivering said charge from said photo-conversion device to said floating diffusion region.

37. The processing system of claim 33 , further comprising a row select transistor coupled to said voltage boost circuit.

38. The processing system of claim 33 , further comprising a source follower transistor coupled to said floating diffusion region.

39. The processing system of claim 33 , wherein said photo-conversion device comprises a photodiode.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2009
From: MICRON TECHNOLOGY, INC.
To: APTINA IMAGING CORPORATION
Reel/Frame 023245/0186 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2004
From: HONG, SUNGKWON C.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 016055/0451 →