IP Library Granted Patent US 7,180,142
Granted Patent B2
US 7,180,142 · App. 11/002,322 · Granted Feb 20, 2007

Semiconductor device

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Quick Facts
Patent No.
US 7,180,142
App. No.
11/002,322
Granted
Feb 20, 2007
Kind
B2
Abstract

The present invention provides a semiconductor device having an active region bent at right angles, wherein an interval between patterns for the active region and a gate is set larger than an arc radius of a curved portion (portion where a line is brought to arcuate form) formed inside the pattern for the bent active region. By defining and designing the pattern interval, the curved portion of the active region do not overlap the gate pattern, and the difference between a device characteristic and a designed value can be prevented from increasing.

Claims (12)

1. A semiconductor device comprising:

an active layer, said active layer being provided with a first portion and a second portion arranged substantially at right angles with each other and connected by an arcuate curved portion therebetween, said arcuate curved portion having an arc radius; and

a gate formed over said first portion of the active layer, said gate being separated from said second portion by a pattern interval,

wherein said pattern interval is larger than said arc radius of said arcuate curved portion.

2. The semiconductor device according to claim 1 , which is an integrated circuit of MOS transistors.

3. The semiconductor device according to claim 2 , which is formed in an SOI substrate.

4. The semiconductor device according to claim 3 , wherein when pattern design of the integrated circuit of the MOS transistors formed in the SOI substrate is performed based on a 0.2 μm design rule, the pattern interval is about 0.4 μm or more.

5. A semiconductor device comprising:

an active layer; and

a gate formed over the active layer, said gate being provided with a first portion and a second portion arranged substantially at right angles with each other and connected by an arcuate curved portion therebetween, said arcuate curved portion having an arc radius, said first portion of said gate overlying said active layer and said second portion being separated from said active layer by an interval,

wherein said interval is larger than said arc radius of said arcuate curved portion.

6. The semiconductor device according to claim 5 , which is an integrated circuit of MOS transistors.

Assignments (3)
CHANGE OF NAME Recorded Mar 21, 2014
From: OKI SEMICONDUCTOR CO., LTD
To: LAPIS SEMICONDUCTOR CO., LTD.
Reel/Frame 032495/0483 →
CHANGE OF NAME Recorded Dec 24, 2008
From: OKI ELECTRIC INDUSTRY CO., LTD.
To: OKI SEMICONDUCTOR CO., LTD.
Reel/Frame 022052/0797 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2004
From: KISHIRO, KOICHI
To: OKI ELECTRIC INDUSTRY CO., LTD.
Reel/Frame 016049/0658 →