Method of evaluating semiconductor device
View Patent ↗The present invention provides a method of evaluating a semiconductor device having an ESD protective element, wherein a MOSFET is formed on the same substrate, comprising a step (electric characteristic measurement) for measuring an electric characteristic of the MOSFET, a step (snapback characteristic measurement) for measuring a snapback characteristic of the MOSFET, a step (impurity profile extraction) for extracting an impurity profile of the MOSFET from the electric characteristic and snapback characteristic of the MOSFET by using an inverse modeling technique, and a step (impurity profile adaptation) for causing the extracted impurity profile of the MOSFET and an impurity profile of the ESD protective element to correspond to each other, whereby the impurity profile of the ESD protective element is evaluated from the electric characteristic.
1. A method of evaluating a semiconductor device having an ESD protective element, wherein a MOSFET is formed on the same substrate, comprising the following steps of:
measuring an electric characteristic of the MOSFET;
measuring a snapback characteristic of the MOSFET;
extracting an impurity profile of the MOSFET from the electric characteristic and snapback characteristic of the MOSFET; and
causing the extracted impurity profile of the MOSFET and an impurity profile of the ESD protective element to correspond to each other.
2. The method according to claim 1 , further including a step for adjusting the concentration of an impurity diffused layer of the ESD protective element after the step for allowing the impurity profile of the MOSFET and the impurity profile of the ESD protective element to correspond to each other.
3. The method according to claim 2 , wherein the electric characteristic of the MOSFET is obtained by measuring at least a current-voltage characteristic or a capacitance-voltage characteristic.
4. The method according to claim 3 , wherein at least a breakdown voltage, a hold voltage or an on resistance is determined from the snapback characteristic of the MOSFET.
5. The method according to claim 4 , wherein the MOSFET includes an N channel MOSFET and a P channel MOSFET.
6. The method according to claim 5 , wherein the ESD protective element is an SCR.
7. The method according to claim 1 , further including a step for adjusting the size of the ESD protective element after the step for causing the impurity profile of the MOSFET and the impurity profile of the ESD protective element to correspond to each other.
8. The method according to claim 7 , wherein the electric characteristic of the MOSFET is obtained by measuring at least a current-voltage characteristic or a capacitance-voltage characteristic.
9. The method according to claim 8 , wherein at least a breakdown voltage, a hold voltage or an on resistance is determined from the snapback characteristic of the MOSFET.
10. The method according to claim 9 , wherein the MOSFET includes an N channel MOSFET and a P channel MOSFET.
11. The method according to claim 10 , wherein the ESD protective element is an SCR.