IP Library Granted Patent US 7,157,303
Granted Patent B2
US 7,157,303 · App. 11/003,370 · Granted Jan 2, 2007

Thin film transistor array substrate and fabricating method thereof

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,157,303
App. No.
11/003,370
Granted
Jan 2, 2007
Kind
B2
Abstract

A thin film transistor array substrate structure includes a plurality of data lines; a plurality of gate lines intersecting the data lines to define pixel areas, the gate line being adjacent to at least two pixel areas; a plurality of common lines disposed between the at least two pixel areas; a plurality of thin film transistors formed at each intersection between the gate lines and the data lines; a plurality of common electrodes provided substantially parallel to the common lines; and a plurality of pixel electrodes connected to the thin film transistors.

Claims (11)

1. A method of fabricating a thin film transistor array substrate structure, comprising:

forming a gate line, a gate electrode connected to the gate line, a common line on a substrate, the common line disposed between at least two gate lines, wherein the at least two gate lines and the data line define a pixel area;

forming a gate insulating film on the substrate;

forming a semiconductor layer on the gate insulating film;

forming a data line, a source electrode and a drain electrode on the semiconductor;

forming a protective film on the substrate; and

forming a pixel electrode on the protective film, wherein the gate lines are disposed adjacently to each of at least two pixel areas, and wherein each respective one of odd-numbered gate lines are adjacent to a respective one of pre-stage even-numbered gate lines.

2. The method as claimed in claim 1 , wherein the pixel electrode includes first and second vertical portions disposed parallel to the data line and a finger portion between the first and second vertical portions.

3. The method as claimed in claim 2 , wherein the common electrode includes first and second vertical portions extended vertically from the common line and a finger portion between the first and second vertical portions.

4. The method as claimed in claim 3 , wherein the finger portion of the pixel electrode and the horizontal portion of the common electrode have a comb shape having a bent portion.

5. The method as claimed in claim 1 , wherein the common lines are formed between the odd-numbered gate lines and the even-numbered gate lines in the pixel areas.

Assignments (2)
CHANGE OF NAME Recorded Oct 17, 2008
From: LG. PHILIPS LCD CO., LTD.
To: LG DISPLAY CO., LTD.
Reel/Frame 021773/0029 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2004
From: SON, HYEON-HO
To: LG. PHILIPS LCD CO., LTD.
Reel/Frame 016052/0072 →