IP Library Granted Patent US 7,372,109
Granted Patent B2
US 7,372,109 · App. 11/004,348 · Granted May 13, 2008

Diode and applications thereof

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Quick Facts
Patent No.
US 7,372,109
App. No.
11/004,348
Granted
May 13, 2008
Kind
B2
Abstract

A diode with low substrate current leakage and suitable for BiCMOS process technology. A buried layer is formed on a semiconductor substrate. A connection region and well contact the buried layer. Isolation regions are adjacent to two sides of the buried layer, each deeper than the buried layer. The isolation regions and the buried layer isolate the connection zone and the well from the substrate. The first doped region in the well is a first electrode. The well and the connection region are electrically connected, acting as a second electrode.

Claims (60)

1. An apparatus, comprising:

a semiconductor substrate of a first conductivity type;

a buried layer of a second conductivity type formed in the semiconductor substrate;

a well of the first conductivity type formed adjacent the buried layer;

a connection region of the second conductivity type formed in the substrate and contacting the buried layer;

two isolation regions, respectively formed in the substrate on two sides of the buried layer, at least one of said isolation regions extending further into the substrate than the buried layer, wherein the isolation regions together with the buried layer isolate the well and the connection region from the semiconductor substrate;

a first doped region of the second conductivity type formed in the well and adapted to provide a first electrode of a diode; and

an anode/cathode interface between the well and the first doped region, the anode/cathode interface extending into the substrate a distance less than the depth of the top of the isolation regions,

wherein the connection region and the well are adapted to be electrically connected and to provide a second electrode of the diode.

2. The apparatus of claim 1 , wherein at least one of said isolation regions comprise:

a deep trench; and

a shallow trench formed on the deep trench.

3. The apparatus of claim 1 , further comprising a second doped region of the first conductivity type in the well, isolated from the first doped region, and adapted to provide an electrical contact of the well.

4. The apparatus of claim 3 , further comprising a shallow trench between the first and the second doped regions.

5. The apparatus of claim 3 , further comprising a third doped region of the second conductivity type formed on the connection region, isolated from the second doped region, and adapted to provide an electrical contact of the connection region and the buried layer.

6. The apparatus of claim 5 , further comprising a shallow trench formed between the third and second doped regions.

7. The apparatus of claim 1 , wherein the connection region comprises a sinker.

8. A system, comprising:

at least one diode, comprising:

a semiconductor substrate of a first conductivity type;

a buried layer formed in the semiconductor substrate of a second conductivity type;

a well of the first conductivity type formed on the buried layer;

a connection region of the second conductivity type formed on and contacting the buried layer;

two isolation regions, formed respectively on two sides of the buried layer, at least one of said isolation regions extending further into the substrate than the buried layer, wherein the isolation regions together with the buried layer isolate the well and the connection region from the semiconductor substrate;

a first doped region of the second conductivity type formed on the well and adapted to provide a first electrode of the diode; and

an anode/cathode interface between the well and the first doped region, the anode/cathode interface extending into the substrate a distance less than the depth of the top of the isolation regions,

wherein the connection region and the well are adapted to be electrically connected and to provide a second electrode of the diode;

a first wire connection, electrically coupled to the first electrode; and

a second wire connection, electrically coupled to the second electrode;

wherein one of the first or second wire connection comprises a first power rail.

9. The system of claim 8 , wherein the other wire connection comprises a second power rail.

10. The system of claim 8 , wherein the other wire connection is connected to an input/output pad.

11. The system of claim 8 , further comprising a plurality of additional diodes forward connected in series to form a diode string including first and second major electrodes, wherein the first and second wire connections are respectively connected to the first and second major electrodes, and, wherein during normal operation, one or more diodes are adapted to be forward biased.

12. The system of claim 11 , further comprising a second diode coupled between the first and second wire connections and adapted to be reverse biased during normal operation.

13. The system of claim 11 , further comprising:

a primary discharge element coupled between the first and second wire connections and having a trigger node; and

a resistor connected with the diode string through a connection node;

wherein the resistor and the diode string are connected in series between the first and second wire connections, and wherein the connection node is connected to the trigger node.

14. The system of claim 11 , wherein the primary discharge element comprises a field oxide MOS transistor, the trigger node comprises a base of a parasitic BJT in the field oxide MOS transistor, and the resistor comprises a spread resistor of the semiconductor substrate connected between the base and a contact of the semiconductor substrate.

15. An apparatus, comprising:

a semiconductor substrate of a first conductivity type, the substrate having formed therein:

a well of a first conductivity type;

a connection region of a second conductivity type adjacent to the well;

a buried layer of the second conductivity type disposed between the substrate and the well, and between the substrate and the connection region;

a first isolation region adjacent to the well; and

a second isolation region adjacent to the connection region

a first doped region of the second conductivity type formed on the well and adapted to provide a first electrode of the diode; and

an anode/cathode interface between the well and the first doped region, the anode/cathode interface extending into the substrate a distance less than the depth of the top of the isolation regions,

wherein the buried layer and the isolation regions electrically isolate the well and the connection region from the substrate.

16. The apparatus of claim 15 , wherein at least one of the isolation regions comprises a deep trench.

17. The apparatus of claim 16 , wherein the deep trench extends further into the substrate than the buried layer.

18. The apparatus of claim 15 , wherein the well and the connection region are adapted to provide a second electrode of the diode.

19. The apparatus of claim 15 , further comprising:

a second doped region of the first conductivity type formed on the well and adapted to act as an electrical contact of the well, wherein the second doped region is electrically isolated from the first doped region.

20. The apparatus of claim 19 , wherein a shallow trench electrically isolates the second doped region from the first doped region.

21. The apparatus of claim 15 , further comprising:

a third doped region of the second conductivity type formed in the connection region and adapted to provide an electrical contact of the connection region, wherein the third doped region is electrically isolated from the second doped region.

22. The apparatus of claim 21 , wherein a shallow trench electrically isolates the third doped region from the second doped region.

23. The apparatus of claim 16 , wherein the first conductivity type comprises p-type conductivity, and wherein the second conductivity type comprises n-type conductivity.

24. The apparatus of claim 16 , wherein the connection region comprises a sinker.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 3, 2024
From: TRANSPACIFIC IP LTD.
To: SUMIKO CAPITAL LLC
Reel/Frame 068784/0299 →
CORRECTIVE ASSIGNMENT, REEL FRAME #018721/0332, EXECUTION DATE 11/15/2006 Recorded Aug 20, 2007
From: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
To: TRANSPACIFIC IP, LTD.
Reel/Frame 019719/0099 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2007
From: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
To: TRANSPACIFIC IP, LTD.
Reel/Frame 018721/0332 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 17, 2006
From: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
To: TRANSPACIFIC IP LTD.
Reel/Frame 018532/0085 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2004
From: CHEN, ZI-PING; KER, MING-DOU
To: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
Reel/Frame 016054/0331 →