Semiconductor memory device
View Patent ↗There is provided a semiconductor memory device in which data, stored in a unit data storage section configured by one or more data storage elements, is erased to be formed into a specific erasure data pattern. The semiconductor memory device has a data protection mechanism in which a determination is made as to whether or not data stored in the unit data storage section has the erasure data pattern, and programming of the data into the unit data storage section is inhibited when the data is not in the erasure data pattern. This mechanism can protect already programmed data from being destroyed due to programming error at the time of programming the data.
1. A semiconductor memory device comprising:
a unit data storage section configured by one or more data storage elements; and
a data protection mechanism for inhibiting programming of data into the unit data storage section, wherein
data stored in the unit data storage section is, after erased, formed into a specific erasure data pattern, and
the data protection mechanism inhibits programming of data into the unit data storage section when the data stored in the unit data storage section is not in the erasure data pattern.
2. The semiconductor memory device according to claim 1 , wherein
the data storage element is configured by a nonvolatile storage element.
3. A semiconductor memory device comprising:
a unit data storage section configured by one or more data storage elements;
an erasing mechanism for erasing data stored in the unit data storage section to form the data after erased into a specific erasure data pattern; and
a data protection mechanism for inhibiting programming of data into the unit data storage section when the data stored in the unit data storage section is not in the erasure data pattern.
4. The semiconductor memory device according to claim 3 , wherein
the data storage element is configured by a nonvolatile storage element.