Inductorless architecture for a switching amplifier
View Patent ↗A switching circuit for generating first and second output signals for differentially driving a load is described. The switching circuit is operable to enforce a minimum pulse width on each of the first and second output signals. The second output signal substantially corresponds to an inverted version of the first output signal delayed by a delay time substantially corresponding to the minimum pulse width.
1. A switching circuit, comprising:
analog processing circuitry operable to receive an analog input signal and generate a processed analog signal;
analog-to-digital conversion circuitry operable to convert the processed analog signal to a first digital signal;
digital processing circuitry operable to convert the first digital signal to first and second power stage drive signals, the digital processing circuitry further being operable to enforce a minimum pulse width on the first and second power stage drive signals;
power stage circuitry operable drive a load differentially with first and second output signals in response to the power stage drive signals;
wherein the digital processing circuitry is operable to generate the first and second power stage drive signals such that the second output signal substantially corresponds to an inverted version of the first output signal delayed by a delay time substantially corresponding to the minimum pulse width.
2. The switching circuit of claim 1 wherein the analog processing circuitry comprises at least one integrator stage and the switching circuit further comprises continuous-time feedback circuitry from the power stage circuitry to the analog processing circuitry.
3. The switching circuit of claim 2 wherein the switching circuit comprises one of a sigma-delta modulator and a modified sigma-delta modulator.
4. The switching circuit of claim 1 wherein the digital processing circuitry comprises a one-shot circuit which is operable to generate the second power stage drive signal in response to the first power stage drive signal.
5. The switching circuit of claim 4 wherein the one-shot circuit is operable to maintain a current signal level of the second power stage drive signal for the delay time in response to each transition of the first power stage drive signal.
6. The switching circuit of claim 1 wherein differentially driving the load with the first and second output signals results in substantial cancellation of portions of the first and second output signals which correspond to the minimum pulse width.
7. The switching circuit of claim 1 wherein the power stage circuitry is operable to drive the load without an intervening output filter.
8. The switching circuit of claim 1 wherein the analog-to-digital conversion circuitry comprises a clocked comparator.
9. The switching circuit of claim 1 wherein the power switching stage comprises first and second output switches in a first bridge configuration operable to generate the first output signal, and third and fourth switches in a second bridge configuration operable to generate the second output signal.
10. The switching circuit of claim 1 wherein the switching circuit comprises one of a switching amplifier and a switching regulator.
11. The switching circuit of claim 1 wherein the switching circuit comprises an audio amplifier.
12. An electronic system comprising at least one of the switching circuit of claim 1 .
13. A switching circuit comprising circuitry for generating first and second output signals for differentially driving a load, the circuitry being operable to enforce a minimum pulse width on each of the first and second output signals, the second output signal substantially corresponding to an inverted version of the first output signal delayed by a delay time substantially corresponding to the minimum pulse width.
14. The switching circuit of claim 13 wherein the switching circuit comprises one of a sigma-delta modulator and a modified sigma-delta modulator.
15. The switching circuit of claim 13 wherein the circuitry comprises a one-shot circuit which is operable to generate the second output signal in response to the first output signal.
16. The switching circuit of claim 15 wherein the one-shot circuit is operable to maintain a current signal level of the second output signal for the delay time in response to each transition of the first output signal.
17. The switching circuit of claim 13 wherein differentially driving the load with the first and second output signals results in substantial cancellation of portions of the first and second output signals which correspond to the minimum pulse width.
18. The switching circuit of claim 13 wherein the circuitry is operable to drive the load without an intervening output filter.
19. The switching circuit of claim 13 wherein the switching circuit comprises one of a switching amplifier and a switching regulator.
20. The switching circuit of claim 13 wherein the switching circuit comprises an audio amplifier.
21. An electronic system comprising at least one of the switching circuit of claim 13 .