Array substrate for reflective and transflective liquid crystal display devices and manufacturing method for the same
View Patent ↗An array substrate for a reflective liquid crystal display device, including a gate line and a data line defining a pixel region by crossing each other; a switching element at a crossing portion of the gate line and the data line; a first passivation layer covering the switching element and the data line; and formed of an inorganic insulating material; a reflective electrode on the first passivation layer, and connected to the switching element; and a second passivation layer on the reflective electrode. The second passivation layer being formed of an organic insulating material.
1. An array substrate for a transflective liquid crystal display device, the substrate comprising;
a thin film transistor including an active layer, a gate electrode and source and drain electrodes, formed sequentially on a substrate;
a gate line including connected to the gate electrode;
a gate pad at a first end of the gate line;
a storage line parallel to the gate line and spaced apart from the gate line;
a data line defining a pixel region by crossing the gate line, the data line being connected to the source electrode, wherein the pixel region is divided into a reflection area and a transmission area;
a data pad at one end of the data line;
an organic insulating layer over the thin film transistor and the data line;
a barrier layer on the organic insulating layer, the barrier layer being formed of an inorganic insulating material;
a reflector on the barrier layer, the reflector being located in the reflection area;
an inorganic insulating layer on the reflector; and
a transparent pixel electrode on the inorganic insulating layer, the pixel electrode contacting the drain electrode, wherein the pixel electrode is located in the reflection area and the transmission area.
2. The substrate according to claim 1 , further comprising:
an insulating layer beneath the organic insulating layer for performing a hydrogenation process of the thin film transistor.
3. The substrate according to claim 1 , further comprising:
a buffer layer beneath the active layer, the buffer layer including an inorganic insulating material such as silicon oxide (SiO 2 ) or silicon nitride (SiN X ).
4. The substrate according to claim 1 , wherein
the active layer is formed of polysilicon.
5. The substrate according to claim 1 , wherein
the storage line and gate line are formed of a same material and on a same layer.
6. The substrate according to claim 1 , wherein
the reflector is formed of a conductive metal material including aluminum (Al) or aluminum alloys.
7. The substrate according to claim 1 , wherein
the pixel electrode is formed of a transparent conductive material including indium tin oxide (ITO) or indium zinc oxide (IZO).
8. The substrate according to claim 1 , wherein
the reflector extends to the data line and covers the thin film transistor.
9. The substrate according to claim 1 , wherein
the reflector is partially overlapped with the gate line or the data line.
10. The substrate according to claim 1 , wherein
the reflector covers the thin film transistor.
11. The substrate according to claim 1 , wherein
the barrier layer is formed using inorganic insulating material including silicon oxide (SiO 2 ) or silicon nitride (SiN X ), for example.
12. A method of forming an array substrate for a transflective liquid crystal display device, the method comprising the steps of:
forming a thin film transistor including a substrate and sequentially forming an active layer, a first insulating layer, a gate electrode, a second insulating layer and source and drain electrodes on the substrate;
forming a gate line and a storage line, the storage line being formed parallel to the gate line and being spaced apart from the gate line;
forming a gate pad at a first end of the gate line;
forming a data line defining a pixel region by crossing the gate line, the data line being connected to the source electrode, wherein the pixel region is divided into a reflection area and a transmission area;
forming a data pad at a first end of the data line;
forming a third insulating layer over the thin film transistor and the data line, the third insulating layer being formed of transparent organic insulating material;
forming a fourth insulating layer on the third insulating layer, the fourth insulating layer being a barrier layer and being formed of inorganic insulating material;
forming a reflector on the barrier layer, being located in the reflection area;
forming a drain contact hole over the drain electrode by depositing and patterning a fifth insulating layer on the reflector;
forming an inorganic insulating layer between the reflector; and
forming a transparent pixel electrode on the inorganic insulating layer, the pixel electrode contacting the drain electrode, wherein the pixel electrode being located in the reflection area and the transmission area.
13. The method according to claim 12 , further comprising:
forming an insulating layer beneath the organic insulating layer to perform a hydrogenation process of the thin film transistor.
14. The method according to claim 12 , further comprising:
forming a buffer layer beneath the active layer using an inorganic insulating material including silicon oxide (SiO 2 ) or silicon nitride (SiN X ).
15. The method according to claim 12 , wherein
the active layer is formed of polysilicon.
16. The method according to claim 12 , wherein
the storage line and gate line are formed with a same material and on a same layer.
17. The method according to claim 12 , wherein
the reflector is formed of a conductive metal material including aluminum (Al) or an aluminum alloy.
18. The method according to claim 12 , wherein
the pixel electrode is formed of transparent conductive material including indium tin oxide (ITO) or indium zinc oxide (IZO).
19. The method according to claim 12 , wherein
the reflector is extended to the data line and covers the thin film transistor.
20. The method according to claim 12 , wherein
the reflector is partially overlapped with the gate line or the data line.
21. The method according to claim 12 , wherein
the reflector covers the thin film transistor.
22. The method according to claim 12 , wherein
the barrier layer is formed using an inorganic insulating material including silicon oxide (SiO 2 ) or silicon nitride (SiN X ).
23. The method according to claim 12 , wherein
the drain contact hole is formed by etching the third insulating layer, the fourth insulating layer and the fifth insulating layer simultaneously with an etching gas including about 65-80% of oxygen gas.