Integrated all-Si capacitive microgyro with vertical differential sense and control and process for preparing an integrated all-Si capacitive microgyro with vertical differential sense
View Patent ↗The present invention relates to a method of manufacturing a cloverleaf microgyroscope containing an integrated post comprising: attaching a post wafer to a resonator wafer, forming a bottom post from the post wafer being attached to the resonator wafer, attaching the resonator wafer to a base wafer, wherein the bottom post fits into a post hole in the base wafer, forming a top post from the resonator wafer, wherein the bottom and top post are formed symmetrically around the same axis, preparing a cap with backside metallization, and attaching a cap wafer on top of the base wafer. The present invention relates further to a gyroscope containing an integrated post with on or off-chip electronics.
1. A method of manufacturing a cloverleaf microgyroscope containing an integrated post comprising:
a) attaching a post wafer to a resonator wafer,
b) forming a bottom post from the post wafer,
c) attaching the resonator wafer to a base wafer, wherein the bottom post fits into a post hole in the base wafer,
d) forming a top post from the resonator wafer, wherein the bottom and top post are formed symmetrically around the same axis,
e) preparing a cap with backside metallization, and
f) attaching a cap wafer on top of the base wafer.
2. The method according to claim 1 , wherein the top post is formed of a bulk silicon base having a thickness of ≦500 μm, a silicon dioxide layer of ≦2 μm and a heavily-doped Silicon epi-layer of 10 μm–20 μm, p-type, 1e19–1e20 cm −3 .
3. The method according to claim 1 , wherein the bottom post is formed of a bulk silicon base having a thickness of ≦500 μm and a silicon dioxide layer of ≦2 μm.
4. The method according to claim 1 , wherein the base wafer is manufactured of substrate containing moderately doped silicon substrate p-type, 1e19 cm −3 with a thickness of about ≦800 μm.
5. The method according to claim 1 , wherein ohmic contacts and interconnect metals containing Al or Al/Ti are formed preferably on the base wafer before the resonator wafer is attached to the base wafer.
6. The method according to claim 1 , wherein electrodes, bond pad, and wire bond metal are formed on the base wafer before the resonator wafer is attached to the base wafer.
7. The method according to claim 2 , wherein electrodes, bond pad, and wire bond metal are formed on the base wafer before the resonator wafer is attached to the base wafer.
8. The method according to claim 1 , wherein a seal ring containing Ti/Pt/Au is formed on the base wafer before the resonator wafer is attached to the base wafer.
9. The method according to claim 1 , wherein the cap wafer is manufactured of lightly doped bulk silicon having a thickness of ≦800 μm.
10. The method according to claim 1 , wherein an opening is prepared in the cap wafer, a wire is led through the opening in the cap wafer and bonded to a bonding pad on the base wafer.
11. The method according to claim 1 , wherein parts of a heavily doped silicon layer of the resonator wafer are removed by resist lithography and photoresist removal.
12. The method according to claim 1 , wherein the bondage between a heavily doped silicon epi-layer of the resonator wafer and a silicon dioxide layer of the post wafer is achieved by heating at a temperature from 800° C. to 1000° C.
13. The method according to claim 1 , wherein a bulk silicon layer and a silicon dioxide layer of the post wafer are partially removed to yield the bottom post by resist lithography, CF 4 /O 2 plasma etch SiO 2 and removal of photoresist.
14. The method according to claim 1 , wherein the bonding of the resonator wafer to the base wafer is carried out by an Au to Au thermo-compression bonding at temperature from 200° C. to 500° C.
15. The method according to claim 1 , wherein a bulk silicon layer and a silicon dioxide of the resonator wafer are partially removed to yield a top post by resist lithography, CF 4 /O 2 plasma etch of SiO 2 and removal of photoresist.
16. The method according to claim 1 , wherein the bondage between the cap wafer and the base wafer is carried out with solder metal at temperature at about 100° C. to 300° C.
17. The method according to claim 1 , wherein a hole in the cap wafer is formed by wet etch of silicon and vacuum oven baking.
18. The method according to claim 1 , wherein a wire bonding is carried out by saw cutting of cap wafer and ball bonding of wires to wire bonding pad of the base wafer.
19. A cloverleaf micro gyroscope with off-chip electronics manufactured by this method according to claim 1 comprising
a) attaching a post wafer to a resonator wafer,
b) forming a bottom post from the post wafer,
c) attaching the resonator wafer to a base wafer, wherein the bottom post fits into a post hole in the base wafer,
d) forming a top post from the resonator wafer, wherein the bottom and top post are formed symmetrically around the same axis,
e) preparing a cap with backside metallization, and
g) attaching a cap wafer on top of the base wafer.
20. A cloverleaf micro gyroscope with off-chip electronics comprising:
a post wafer attached to a resonator wafer;
a top post and a bottom post formed from the post wafer, wherein the bottom and top post are formed symmetrically around the same axis;
a base wafer attached to the resonator wafer, wherein the bottom post fits into a post hole in the base wafer;
a cap with backside metallization attached to the base wafer.