IP Library Granted Patent US 7,362,319
Granted Patent B2
US 7,362,319 · App. 11/011,399 · Granted Apr 22, 2008

Method and apparatus for auto-generation of horizontal synchronization of an analog signal to a digital display

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Quick Facts
Patent No.
US 7,362,319
App. No.
11/011,399
Granted
Apr 22, 2008
Kind
B2
Abstract

Determining a horizontal resolution and a phase of an analog video signal arranged to display a number of scan lines each formed of a number of pixels is described. A number of initialization values are set where at least one of the initialization values is a current horizontal resolution and then a difference value for each immediately adjacent ones of the pixels is determined. Next, an edge flag value based upon the difference value is stored in at least one of a number of accumulators such that when at least one of the accumulators has a stored edge flag value that is substantially greater than those stored edge flag values in the other accumulators, then the horizontal resolution is set to the current resolution.

Claims (26)

1. A selectable analog video signal synthesizer unit coupled to an analog video source and arranged to provide an analog video signal operable in a number of operating modes that includes a normal mode, an H total mode, and a phase mode, comprising:

a selectable set of analog switches operable in a number of switching modes coupled to the video source;

a number of analog/digital converter units (ADC) each of which is connected to a corresponding one of the set of analog switches;

a difference circuit arranged to receive an output signal from at least one of the ADCs and provide a differenced output signal based upon the operating mode; and

an output unit coupled to the difference circuit arranged to provide an H total value in the H total mode based on the detection of edges of image features in a video frame from the video source and a phase value in the phase mode for the analog video signal.

2. An analog video signal synthesizer unit as recited in claim 1 wherein the video synthesizer unit is coupled to a digital display.

3. An analog video signal synthesizer unit as recited in claim 2 , wherein the digital display is an LCD capable of receiving and displaying an analog video signal formed of a number of individual video frames from an analog video source.

4. An analog video signal synthesizer unit as recited in claim 3 wherein each video frame includes video information displayed as the displayed features taken together form a displayed image on the display LCD.

5. An analog video signal synthesizer unit as recited in claim 4 , wherein the analog video signal synthesizer unit is a pre-processor.

6. An analog video signal synthesizer unit as recited in claim 4 , wherein the analog video signal synthesizer unit is an integrated circuit.

7. An analog video signal synthesizer unit as recited in claim 6 , wherein, the video signal synchronizer unit is included in an input system suitably arranged for pre-processing video signals derived from the analog video source.

8. An analog video signal synthesizer unit as recited in claim 4 , wherein the analog video source is an analog video camera.

9. An analog video signal synthesizer as recited in claim 4 , wherein analog video signal synthesizer is active during a display monitor initialization procedure.

10. An analog video signal synthesizer as recited in claim 4 , wherein analog video signal synthesizer is active when a display resolution has been changed from a first resolution to a second resolution, and vice versa.

11. An analog video signal synthesizer as recited in claim 10 , wherein the first resolution is VGA and the second resolution is XGA.

12. An analog video signal synthesizer as recited in claim 11 wherein the analog video signal synthesizer is activated either manually or automatically.

13. An analog video signal synthesizer as recited in claim 1 , wherein when the analog video signal synthesizer unit is operating in the H total mode, the difference circuit is arranged to provide a differenced output signal for each combination of two ADCs based on the difference in the output signals from the two corresponding ADCs of the particular combination.

14. An analog video signal synthesizer as recited in claim 13 , further comprising a difference register and a number of comparators, each comparator being coupled to the difference register and a differenced output signal for a particular combination of ADCs, each comparator being arranged to compare the associated difference output signal with a value in the difference register.

15. An analog video signal synthesizer as recited in claim 14 , further comprising a number of output registers, wherein when the output of a one of the comparators is above a threshold, an edge flag in at least one of the output registers is set to a value of 1 from a default value of 0 to indicate the presence of an edge.

16. An analog video signal synthesizer as recited in claim 15 , further comprising a number of edge accumulators that accumulate edge flag data.

17. An analog video signal synthesizer as recited in claim 16 , further comprising a calculator unit that calculates the H total value based upon a pattern of the edge flag data.

18. An analog video signal synthesizer as recited in claim 1 , wherein the video source is comprised of Red, Green and Blue components and wherein each analog switch receives a different one of the Red, Green or Blue components.

19. An analog video signal synthesizer as recited in claim 18 , wherein each ADC coupled to a one of the analog switches is staggered in time by one-third of a pixel clock.

20. An analog video signal synthesizer as recited in claim 1 , wherein the phase value is based on a pixel clock associated with a central portion of a flat region detected for the analog video signal.

21. An analog video signal synthesizer as recited in claim 20 , wherein when the analog video signal synthesizer unit is operating in the phase mode, the difference circuit is arranged to generate a differenced output signal for only two of the ADCs.

22. An analog video signal synthesizer as recited in claim 21 , wherein each ADC coupled to a one of the analog switches is separated in time by one phase step.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2009
From: GENESIS MICROCHIP (DELAWARE) INC.
To: TAMIRAS PER PTE. LTD., LLC
Reel/Frame 022917/0377 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2008
From: NEAL, GREG
To: GENESIS MICROCHIP (DELAWARE) INC.
Reel/Frame 021965/0156 →
CHANGE OF NAME Recorded Apr 15, 2008
From: GENESIS MICROCHIP CORPORATION
To: GENESIS MICROCHIP (DELAWARE) INC.
Reel/Frame 020930/0333 →
CHANGE OF NAME Recorded Apr 15, 2008
From: GENESIS MICROCHIP CORPORATION
To: GENESIS MICROCHIP (DELAWARE) INC.
Reel/Frame 020963/0098 →