Memory management unit technique to detect cross-region pointer stores

1. A method for detecting an invalid pointer comprising a source component and a target component, comprising:

selecting a virtual source memory address for the source component wherein the virtual source memory address is within a first valid virtual address range;

selecting a virtual target memory address for the target component wherein the virtual target memory address is within a second valid virtual address range;

numerically combining the virtual source memory address and the virtual target memory address to obtain a new virtual source memory address; and

writing the virtual target memory address into a memory location referenced by the new virtual source memory address, wherein writing the virtual target memory address triggers an action by a memory management unit (MMU) if the new virtual source memory address is an invalid memory location.

2. The method of claim 1 , wherein numerically combining the virtual source memory address and the virtual target memory address comprises:

masking a portion of the virtual target memory address to obtain a masked target memory address; and

adding the virtual source memory address with the masked target memory address to obtain the new virtual source memory address.

3. The method of claim 2 , wherein masking the portion of the virtual target memory address uses a specified constant value.

4. The method of claim 1 , wherein the action taken by the MMU comprises throwing an exception, wherein the exception is handled by an exception handler.

5. The method of claim 1 , wherein the invalid memory location is at least one selected from the group consisting of an unmapped memory location and a write-protected memory location.

6. The method of claim 1 , wherein the virtual source memory address and the virtual target memory address are mapped to a single physical memory region.

7. The method of claim 1 , wherein the first valid memory address range and the second valid memory address range are mapped to a single region of physical memory.

8. A system for detecting an invalid pointer comprising:

a source component and target component of a valid pointer, wherein the source component and the target component are located in a specific memory region;

a memory management unit configured to select:

a virtual source memory address for the source component wherein the virtual source memory address is within a first valid virtual address range, and

a virtual target memory address for the target component wherein the virtual target memory address is within a second valid virtual address range; and

a new virtual source memory address obtained by numerically combining the virtual source memory address and the virtual target memory address, wherein writing the virtual target memory address triggers an action by a memory management unit (MMU) if the new virtual source memory address an invalid memory location.

9. The system of claim 8 , wherein numerically combining the virtual source memory address and the virtual target memory address comprises:

masking a portion of the virtual target memory address to obtain a masked target memory address; and

adding the virtual source memory address with the masked target memory address to obtain the new virtual source memory address.

10. The system of claim 9 , wherein a specified constant value is used to mask the portion of the virtual target memory address.

11. The system of claim 8 , wherein the action taken by the MMU comprises throwing an exception, wherein the exception is handled by an exception handler.

12. The system of claim 8 , wherein the invalid memory location is at least one selected from the group consisting of an unmapped memory location and a write-protected memory location.

13. The system of claim 8 , wherein the virtual source memory address and the virtual target memory address are mapped to a single physical memory region.

14. The system of claim 8 , wherein the first virtual address range and the second virtual address range are mapped to a single region of physical memory.

15. A computer readable medium comprising software instructions for detecting a invalid pointer comprising a source component and a target component, wherein the software instructions comprise functionality to:

select a virtual source memory address for the source component wherein the virtual source memory address is within a first valid virtual address range;

select a virtual target memory address for the target component wherein the virtual target memory address is within a second valid virtual address range;

numerically combine the virtual source memory address and the virtual target memory address to obtain a new virtual source memory address; and

write the virtual target memory address into a memory location referenced by the new virtual source memory address, wherein writing the virtual target memory address triggers an action by a memory management unit (MMU) if the new virtual source memory address is an invalid memory location.

16. The computer readable medium of claim 15 , wherein numerically combining the virtual source memory address and the virtual target memory address comprises:

masking a portion of the virtual target memory address to obtain a masked target memory address; and

adding the virtual source memory address with the masked target memory address to obtain the new virtual source memory address.

17. The computer readable medium of claim 16 , wherein a specified constant value is used to mask the portion of the virtual target memory address.

18. The computer readable medium of claim 15 , wherein the action taken by the MMU comprises throwing an exception, wherein the exception is handled by an exception handler.

19. The computer readable medium of claim 15 , wherein the virtual source memory address and the virtual target memory address are mapped to a single physical memory region.

20. The computer readable medium of claim 15 , wherein the invalid memory location is at least one selected from the group consisting of an unmapped memory location and a write-protected memory location.

21. The computer readable medium of claim 15 , wherein the first virtual address range and the second virtual address range are mapped to a single region of physical memory.

22. A computer system for detecting a valid pointer comprising a source component and a target component, comprising:

a processor;

a memory;

a storage device; and

software instructions stored in the memory for enabling the computer system under control of the processor to:

select a virtual source memory address for the source component wherein the virtual source memory address is within a first valid virtual address range;

select a virtual target memory address for the target component wherein the virtual target memory address is within a second valid virtual address range;

numerically combine the virtual source memory address and the virtual target memory address to obtain a new virtual source memory address; and

write the virtual target memory address into a memory location referenced by the new virtual source memory address, wherein writing the virtual target memory address triggers an action by a memory management unit (MMU) if the new virtual source memory address is an invalid memory location.

23. The computer system of claim 22 , wherein numerically combining the virtual source memory address and the virtual target memory address comprises:

masking a portion of the virtual target memory address to obtain a masked target memory address; and

adding the virtual source memory address with the masked target memory address to obtain the new virtual source memory address.

24. The computer system of claim 23 , wherein a specified constant value is used to mask the portion of the virtual target memory address.

25. The computer system of claim 22 , wherein the action taken by the MMU comprises throwing an exception, wherein the exception is handled by an exception handler.

26. The computer system of claim 22 , wherein the invalid memory location is at least one selected from the group consisting of an unmapped memory location and a write protected memory location.

27. The computer system of claim 22 , wherein the virtual source memory address and the virtual target memory address are mapped to a single physical memory region.

28. The computer system of claim 22 , wherein the first virtual address range and the second virtual address range are mapped to a single region of physical memory.