System and method for reducing phase distortion in a linear transmitter via the introduction of bias currents to a power amplifier
The invention decreases phase distortion in a transmitter by balancing C load in the power amplifier input such that a PGA won't have phase distortion.
1 . A power amplifier, comprising:
two sets of differential pairs;
a differential inductor coupled to each of the differential pairs;
wherein each of the differential pairs includes a bias transistor supplying a bias voltage to the amplifier that in combination balance the C load; and
wherein a change in current in a bias transistor of one of the differential pairs is independent of current in the other bias transistor.
2 . The amplifier of claim 1 , wherein output of the pairs are combined.
3 . The amplifier of claim 1 , wherein the amplifier tunes out parasitic capacitance.
4 . The amplifier of claim 1 , wherein each pair includes a positive and a negative branch.
5 . The amplifier of claim 1 , wherein one pair has a bias voltage in Class AB operation while the other pair has a bias voltage close to Class B operation.
6 . The amplifier of claim 1 , wherein the amplifier includes a plurality current mirrors the enable the independent change of current in a bias transistor.
7 . A transmitter having an amplifier according to claim 1 .
8 . A method, comprising:
presenting a load by two sets of differential pairs of a power amplifier, wherein the pairs are coupled to a differential inductor;
supplying bias voltages to the differential pairs that in combination balance the C load; and
wherein a change in current in a bias transistor of one of the differential pairs is independent of current in the other bias transistor.
9 . The method of claim 8 , further comprising combining the output of the pairs.
10 . The method of claim 8 , wherein the amplifier tunes out parasitic capacitance.
11 . The method of claim 8 , wherein each pair includes a positive and a negative branch.
12 . The method of claim 8 , wherein one pair has a bias in Class AB operation while the other pair has a bias voltage close to Class B operation.
13 . The method of claim 8 , wherein the amplifier includes a plurality current mirrors the enable the independent change of current in a bias transistor.