Thin film transistor array panel for a display
View Patent ↗A thin film transistor array panel comprising: an insulating substrate; gate lines formed on the insulating substrate; data lines defining a display region by intersecting the gate lines while being insulated; an electrostatic dispersion line intersecting the gate lines; diodes adhered to the gate lines and to the electrostatic dispersion line; and a repair line for repairing the data lines formed on the insulating substrate outside the display region and intersecting the electrostatic dispersion line while being insulated. According to the present invention, since static electricity flowing along the repair line is not transferred to the data lines, defects of a thin film transistor of the display region may be prevented.
1. A thin film transistor array panel comprising:
an insulating substrate;
gate lines formed on the insulating substrate;
data lines insulated from the gate lines and defining a display region by intersecting the gate lines;
an electrostatic dispersion line intersecting the gate lines;
diodes connected to the gate lines and the electrostatic dispersion line; and
repair lines for repairing the data lines formed on the insulating substrate outside the display region and insulatedly intersecting the data lines operatively intersect the electrostatic dispersion line outside the display region.
2. The thin film transistor array panel of claim 1 , comprising:
first diodes connected to the gate lines and to the electrostatic dispersion line so a forward current can flow from the gate lines to the electrostatic dispersion line through the first diodes;
second diodes connected to the gate lines and to the electrostatic dispersion line so a forward current can flow from the electrostatic dispersion line to the gate lines through the second diodes, wherein both of the first and the second diodes are formed on the insulating substrate outside the display region.
3. The thin film transistor array panel of claim 1 , comprising:
a first repair line intersecting the data lines;
a second repair line not intersecting the data lines; and
a repair line connection bar intersecting both of the first repair line and the second repair line.
4. The thin film transistor array panel of claim 3 , wherein the second repair line intersects the electrostatic dispersion line while being insulated.
5. The thin film transistor array panel of claim 3 , further comprising a wiring that is farther than the second repair line from the display region and is adjacent to the second repair line.
6. The thin film transistor array panel of claim 1 , wherein the electrostatic dispersion line intersects the repair line before the repair line intersects the data lines.
7. The thin film transistor array panel of claim 1 , further comprising an insulating layer interposed between the repair line and the electrostatic dispersion line.
8. The thin film transistor array panel of claim 1 , wherein the repair line intersects the data lines.
9. A thin film transistor array panel comprising:
an insulating substrate;
a first signal line formed on the insulating substrate;
a second signal line intersected the first signal line, and defining the display region by insulatedly intersecting the first signal line;
an electrostatic dispersion line insulatedly intersecting the first signal line;
a diode connected the first signal line and the electrostatic dispersion line; and
periphery wiring formed on the insulating substrate outside the display region, and operatively intersecting the electrostatic dispersion line. outside the display region.
10. The thin film transistor array panel of claim 9 , wherein the periphery wiring intersects the second signal line while being insulated.