IP Library Granted Patent US 7,631,132
Granted Patent B1
US 7,631,132 · App. 11/023,137 · Granted Dec 8, 2009

Method and apparatus for prioritized transaction queuing

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Quick Facts
Patent No.
US 7,631,132
App. No.
11/023,137
Granted
Dec 8, 2009
Kind
B1
Abstract

A first queue receives transactions from a transaction source in first-in/first-out (FIFO) order regardless of priority. A second queue receives lower priority transactions from the first queue as compared to the higher priority transactions remaining in the first queue. A priority check module controls the forwarding schedule of transactions from the first and second queues in accordance with the associated priorities of the stored transactions. Should an address conflict arise between transactions in the first and second queues, the priority check module stalls forwarding from the first queue while promoting forwarding from the second queue during the conflict condition.

Claims (23)

1. A circuit for prioritized queuing of transactions, comprising:

a first buffer coupled to receive transactions;

a priority check module coupled to the first buffer and adapted to detect a priority level of the transactions received at the first buffer;

a second buffer coupled to the first buffer and adapted to receive transactions from the first buffer that are identified by the priority check module to have low priority;

a multiplexer having inputs coupled to the first and second buffers, and having a control input: and

wherein the priority check module is further adapted to provide a control signal to the control input of the multiplexer to enable the transactions from the first buffer that are identified to have a high priority to bypass the second buffer and be output by the multiplexer.

2. The circuit according to claim 1 , wherein the priority check module is further adapted to determine a forwarding schedule for the received transactions.

3. The circuit according to claim 1 , wherein the second buffer further comprises conflict logic adapted to determine a location of each transaction in the second buffer having an address conflict with transactions in the first buffer.

4. The circuit according to claim 3 , wherein the second buffer further comprises a conflict buffer adapted to store each transaction in the second buffer having an address conflict with transactions in the first buffer.

5. A method comprising:

entering transaction requests into a first first-in-last-out (FIFO) queue adapted to receive transactions;

determining a priority of the transaction requests reaching an output of the first FIFO queue;

entering the transaction requests having a first priority from the output of the first FIFO queue into a second FIFO queue, wherein the input of the second FIFO queue is coupled to the output of the first FIFO queue; and

directing, in response to the determined priority of the transaction requests reaching the output of the first FIFO queue, requests having a first priority from the output of the first FIFO queue to their respective destinations so that these first priority requests bypass the second FIFO queue.

6. The method of claim 5 , wherein the first priority is a lower priority relative to the second priority.

7. The method of claim 5 , further comprising directing the transaction requests from an output of the second FIFO queue to their respective destinations when no transaction requests having the first priority are present in the first FIFO queue.

8. The method of claim 5 , wherein determining the priority based on information in a header comprises determining the priority based on a priority indicator in the header of the respective transaction request.

9. The method of claim 5 , wherein determining a priority of the transaction requests comprises identifying the priority of the transaction request at the output of the first FIFO queue based on a destination identifier of the transaction request.

10. The method of claim 5 , wherein determining a priority of the transaction requests comprises identifying the priority of the transaction request at the output of the first FIFO queue based on a source identifier of the transaction request.

11. The method of claim 5 , wherein determining a priority of the transaction requests comprises identifying the priority of the transaction request at the output of the first FIFO queue based on an operation type of the transaction request.

12. The method of claim 11 , wherein the operation type is a read operation, and wherein identifying the priority of the transaction request at the output of the first FIFO queue comprises designating a high priority rating to the read operation relative to the priority of a write operation.

13. The method of claim 5 , wherein determining a priority of the transaction requests comprises identifying the priority of the transaction request at the output of the first FIFO queue based on a data size of the transaction request.

14. The method of claim 5 , further comprising controllably disabling the determining of the priority of the transaction requests and the entering of transaction requests into the second FIFO queue, and directing all of the transaction requests from the first FIFO queue to their respective destinations.

Assignments (5)
AMENDED AND RESTATED PATENT SECURITY AGREEMENT Recorded Jun 27, 2025
From: UNISYS CORPORATION; UNISYS HOLDING CORPORATION; UNISYS NPL, INC.; UNISYS AP INVESTMENT COMPANY I
To: COMPUTERSHARE TRUST COMPANY, N.A., AS COLLATERAL TRUSTEE
Reel/Frame 071759/0527 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2020
From: WELLS FARGO BANK, NATIONAL ASSOCIATION
To: UNISYS CORPORATION
Reel/Frame 054231/0496 →
RELEASE OF SECURITY INTEREST Recorded Nov 9, 2017
From: WELLS FARGO BANK, NATIONAL ASSOCIATION (SUCCESSOR TO GENERAL ELECTRIC CAPITAL CORPORATION)
To: UNISYS CORPORATION
Reel/Frame 044416/0358 →
SECURITY INTEREST Recorded Oct 6, 2017
From: UNISYS CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 044144/0081 →
PATENT SECURITY AGREEMENT Recorded Apr 27, 2017
From: UNISYS CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL TRUSTEE
Reel/Frame 042354/0001 →