Nonvolatile flash memory device

1. A nonvolatile memory device comprising:

a polysilicon gate on a semiconductor substrate, the polysilicon gate having lateral faces;

a gate oxide layer between the polysilicon gate and the substrate;

sidewall floating gates on the bottom of the lateral faces of the polysilicon gate;

tunnel oxide layers between the sidewall floating gates and the substrate;

block oxide layers between the polysilicon gate and the sidewall floating gates, the block oxide layers also being between the gate oxide layer and the tunnel oxide layer;

sidewall spacers on the sidewalls of the polysilicon gate and the sidewall floating gates;

a polysilicon oxide layer covering a top and side of the polysilicon gate and a side of the sidewall floating gates, the polysilicon oxide layer being between the sidewall spacers and the polysilicon gate and the sidewall floating gates;

source and drain extension regions in the substrate under the sidewall spacers; and

source and drain regions adjacent to the source and drain extension regions.

2. The device of claim 1 , further comprising a polysilicon oxide layer between the sidewall spacers and the polysilicon gate, and between the sidewall spacers and the sidewall floating gates.

3. The device of claim 1 , wherein the polysilicon gate comprises an upper part and a lower part, and the upper part is wider than the lower part.

4. The device of claim 1 , wherein the block oxide layers comprise a first block oxide layer and a second block oxide layer.

5. The device of claim 4 , wherein the first block oxide layer is made of Al 2 O 3 or Y 2 O 3 with a thickness between 50 Å and 250Å.

6. The device of claim 4 , wherein the second block oxide layer is made of SiO 2 with a thickness between 20 Å and 150Å.