Semiconductor device with temperature control mechanism

1. A semiconductor device, comprising:

a semiconductor chip having a first metal heat-conductive medium in the inside thereof;

a substrate having a second metal heat-conductive medium thermally connected to the first metal heat-conductive medium; and

a temperature control device of which at least a part is disposed on said substrate, thermally connected to the second metal heat-conductive medium, and configured to control the temperature within said semiconductor chip,

wherein said temperature control device is at least either of a heat sink plate, a heat sink fin, a peltier element, and a cooling module whose cooling medium is liquid or gas.

2. The semiconductor device according to claim 1 , wherein the first metal heat-conductive medium is a dummy wiring.

3. The semiconductor device according to claim 2 , wherein the dummy wiring includes a plurality of dummy wiring layers and a dummy via connecting between the dummy wiring layers.

4. The semiconductor device according to claim 3 , wherein the dummy via is elliptic cylinder-shaped or pattern formed in a wire state.

5. The semiconductor device according to claim 3 , wherein the dummy wiring layers and the dummy via are composed of metal.

6. The semiconductor device according to claim 5 , wherein the metal is Cu, Al, Ag, or alloys of thereof.

7. The semiconductor device according to claim 2 , wherein the dummy wiring is formed in a insulation film formed in said semiconductor chip, and the insulation film comprises a low dielectric constant insulating film having a dielectric constant not more than 3.0.

8. The semiconductor device according to claim 1 , wherein the second metal heat-conductive medium is a dummy wiring.

9. The semiconductor device according to claim 8 , wherein the dummy wiring is composed of metal.

10. The semiconductor device according to claim 1 , wherein the first metal heat-conductive medium and the second metal heat-conductive medium are thermally connected through a dummy bump.

11. The semiconductor device according to claim 2 , wherein the electric potential of the dummy wiring is a ground potential.

12. The semiconductor device according to claim 1 , wherein the first metal heat conductive medium and the second metal heat conductive medium are thermally connected through a dummy bonding wire.

13. The semiconductor device according to claim 2 , wherein said semiconductor chip further includes a wiring, and the wiring and the dummy wiring are insulated.

14. The semiconductor device according to claim 13 , wherein the distance between the wiring and the dummy wiring is not less than 1 μm nor more than 5 μm.

15. The semiconductor device according to claim 2 , wherein said semiconductor chip further includes a wiring, and the wiring and the dummy wiring have damascene wiring structures.

16. The semiconductor device according to claim 1 , wherein said semiconductor chip and said substrate further include a wiring respectively, and the wiring of said semiconductor chip and the wiring of said substrate are electrically connected in the same connection mode as the thermal connection between the first metal heat-conductive medium and the second metal heat-conductive medium.

17. The semiconductor device according to claim 1 , wherein the cooling medium of the cooling module is water, liquid nitrogen, or inert gas, and the cooling medium is connected to an another cooling module configured to cool the cooling medium through a pipe.

18. The semiconductor device according to claim 1 , further comprising:

a heat sink plate covering said semiconductor chip; and

a thermal paste filled between said semiconductor chip and the heat sink plate.

19. The semiconductor device according to claim 18 , wherein said semiconductor chip includes a semiconductor substrate and a wiring structure disposed above said semiconductor substrate and having said first metal heat conductive medium therein, and said thermal paste is filled between said semiconductor substrate and the heat sink plate.