Method for providing a temporary, deep shunt on wafer structures for electrostatic discharge protection during processing

1. A method of temporarily protecting an electrically sensitive component from damage due to electrostatic discharge, the method comprising:

(a) defining a first shield that forms a first lead for both a component and a shunt;

(b) depositing a conductive material on the first shield to form the component and the shunt;

(c) defining an edge of the component and an edge of the shunt together in a single masking step;

(d) refilling with insulation adjacent the component and the shunt up to the edges of the component and the shunt on the first shield;

(e) defining a second shield on both the component and the shunt that forms a second lead for both the component and the shunt to form a shunted assembly that electrically protects the component;

(f) lapping the shunted assembly; and

(g) removing a portion of the shunted assembly to remove the shunt and form an electrical open for an unshunted assembly.

2. A method as defined in claim 1 , wherein the component is a TMR sensor, and the shunted assembly is lapped in a single plane to form an air bearing surface.

3. A method as defined in claim 1 , wherein step (c) comprises forming the edge of the shunt at a length that is greater than a length of the component via photoresist and ion milling.

4. A method as defined in claim 1 , wherein step (d) comprises refilling with alumina as the insulation that refills via self alignment.

5. A method as defined in claim 1 , wherein step (f) is performed after wafer level processing, and further comprising additional slider processing steps for the shunted assembly after step (f) and before step (g).

6. A method as defined in claim 1 , wherein step (g) is performed while protecting a region of the component with photoresist.

7. A method as defined in claim 1 , wherein step (g) comprises one of ion milling and reactive ion etching.

8. A method of temporarily protecting an electrically sensitive component from damage due to electrostatic discharge, the method comprising:

(a) depositing a conductive material on a wafer to form the component and a shunt;

(b) defining an edge of the component and an edge of the shunt together in a single masking step;

(c) refilling with insulation adjacent the component and the shunt up to the edges of the component and the shunt on the wafer;

(d) defining a track width of the component and the shunt in a photolithography step;

(e) refilling the component and the shunt using self-alignment to refill with conductive material on sides of the component and the shunt to form a shunted assembly;

(f) lapping the shunted assembly; and

(g) removing a portion of the shunted assembly to remove the shunt and form an electrical open for an unshunted assembly.

9. A method as defined in claim 8 , wherein the shunted assembly is lapped in a single plane to form an air bearing surface.

10. A method as defined in claim 8 , wherein step (f) is performed after wafer level processing, and further comprising additional slider processing steps for the shunted assembly after step (f) and before step (g).

11. A method as defined in claim 8 , wherein step (g) is performed while protecting a region of the component with photoresist.

12. A method as defined in claim 8 , wherein step (g) comprises one of ion milling and reactive ion etching.