IP Library Granted Patent US 7,710,700
Granted Patent B2
US 7,710,700 · App. 11/030,993 · Granted May 4, 2010

DC/DC converter with current limit protection

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,710,700
App. No.
11/030,993
Granted
May 4, 2010
Kind
B2
Abstract

A converter coupled to a DC voltage input and connectable to a load, includes a signal responsive switch coupled between a first circuit point and a second circuit point. Current flow is directed by the switch, when in a closed state, to the second circuit point to bypass the load. A regulator circuit has an output coupled to a control input of the switch. The regulator circuit has a first input for receiving a sensed load parameter, a second input for receiving a sensed current level signal at the second circuit point when the switch is in its closed state, and a third input for receiving a sensed current level signal at the second circuit point, measured directly, when the switch is in an open state. A fixed minimum time is set for the switch to be in the open state. The third input inhibits re-closing of the switch, providing current limit protection for the switch.

Claims (33)

1. A converter circuit connectable to receive an input DC voltage at a first voltage level and provide an output DC voltage at a second voltage level to a load, comprising:

a switch;

a first current flow path when the switch is in an on-state, the first current flow path bypassing the load;

a second current flow path when the switch is in an off-state, the second current flow path being electrically isolated from the input DC voltage, the second current flow path including a unidirectional current conducting device; and

a control circuit coupled to the switch and configured to receive signals related respectively to a load parameter, current through the switch when the switch is in the on-state and current through the unidirectional current conducting device only when the switch is in the off-state, and in response, controlling the state of the switch.

2. A converter circuit as recited in claim 1 , wherein the control circuit initiates the off-state switch condition when the switch current attains a prescribed level, and the control circuit comprises a delay circuit for maintaining the off-state of the switch for a fixed time period.

3. A converter circuit as recited in claim 2 , wherein the control circuit initiates transition of the switch from off-state condition to the on-state condition after the fixed time period when the load parameter exceeds a threshold level.

4. A converter circuit as recited in claim 3 , wherein said transition is inhibited when the current through the unidirectional current conducting device is at an excessive level.

5. A converter circuit as recited in claim 1 , further comprising a load voltage feedback circuit coupled between the load and the control circuit, and wherein the load parameter is load voltage.

6. A converter circuit as recited in claim 1 , wherein the output DC voltage is inverted in polarity from the polarity of the input DC voltage.

7. A converter circuit for receiving an input DC voltage to produce an output DC voltage supplied to a load, the output voltage having a polarity inverse with respect to a polarity of the input voltage, the circuit comprising:

a signal responsive switch coupled between a first circuit point and a second circuit point;

a unidirectional current conducting device coupled between a third circuit point and the second circuit point, and conducting current during a time period when the switch is in an open state; and

a regulator circuit having an output coupled to a control input of the switch, the regulator circuit receiving at a first input thereof a sensed load parameter signal, receiving at a second input thereof a sensed current level signal at the second circuit point when the switch is in a closed state, and receiving at a third input thereof a sensed current level signal at the second circuit point only when the switch is in an open state; the second circuit point being coupled to a first terminal of an input voltage supply.

8. A converter circuit as recited in claim 7 , further comprising a load voltage feedback circuit coupled to the first regulator circuit input and wherein the load parameter is load voltage.

9. A converter circuit as recited in claim 7 , wherein the first and third circuit points are coupled with a capacitor.

10. A converter circuit as recited in claim 9 , wherein current flowing into the first and third circuit points is coupled with a transformer.

11. A converter circuit as recited in claim 9 , wherein the third input of the regulator circuit is coupled to a circuit element operable to conduct unidirectional current, the circuit element connected across the second and third circuit points.

12. A converter circuit as recited in claim 11 , wherein the circuit element is a diode.

13. A converter circuit as recited in claim 11 , wherein the regulator circuit comprises:

a latch circuit having an output coupled to a control input of the signal responsive switch, a set input terminal coupled to the first input and the third input, and a reset input terminal coupled to the second input.

14. A converter circuit as recited in claim 13 , further comprising a delay circuit coupled between a reset output terminal of the latch circuit and the set input terminal.

15. A method for controlling an inverting power regulator comprising the steps of:

coupling a first circuit point to a second circuit point in response to a load parameter exceeding a predetermined level;

decoupling the first circuit point from the second circuit point in response to a current therebetween exceeding a current threshold level during the coupled state;

delaying recoupling of the first circuit point to the second circuit point by at least a fixed timed period after the decoupling step; and

inhibiting the recoupling of the first and second circuit points during an excessive current condition existing between a third circuit point and the second circuit point during the decoupled state.

16. A method as recited in claim 15 , wherein the load parameter is load voltage.

17. A method as recited in claim 16 , wherein the second circuit point is a power supply terminal.

18. A method as recited in claim 17 , wherein the excessive current condition is a current level at the second circuit point during the decoupled state.

19. A method as recited in claim 15 , wherein the step of inhibiting recoupling comprises sensing current through a diode connected in series with the second circuit point.

20. A converter circuit as recited in claim 14 , further comprising a gate having three inputs and an output, the output of the gate coupled to the set input of the latch circuit, a first input of the gate coupled to the first input, a second input of the gate coupled to the third input, and a third input of the gate coupled to the delay circuit.

21. A method as recited in claim 15 , wherein a load voltage has a polarity inverse with respect to a polarity of an input voltage of the regulator.

Assignments (3)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Dec 3, 2024
From: MONROE CAPITAL MANAGEMENT ADVISORS, LLC, AS COLLATERAL AGENT
To: SOUNDHOUND, INC.
Reel/Frame 069480/0312 →
CHANGE OF NAME Recorded Sep 4, 2021
From: LINEAR TECHNOLOGY CORPORATION
To: LINEAR TECHNOLOGY LLC
Reel/Frame 057421/0168 →
CHANGE OF NAME Recorded Sep 4, 2021
From: LINEAR TECHNOLOGY LLC
To: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY
Reel/Frame 057422/0001 →