IP Library Granted Patent US 7,484,070
Granted Patent B1
US 7,484,070 · App. 11/032,456 · Granted Jan 27, 2009

Selective memory block remapping

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Quick Facts
Patent No.
US 7,484,070
App. No.
11/032,456
Granted
Jan 27, 2009
Kind
B1
Abstract

A memory of allocating memory for use by a subfunction of a computer chip, wherein the subfunction uses contiguous memory regions, the method comprising the steps of (a) creating a placeholder for contiguous memory buffers used by the subfunction of the chip by reserving a region of memory subsystem space, wherein the region does not need to be backed by true physical storage and the size is at least as large as the contiguous memory buffer required by the subfunction, (b) allocating pages of remaining memory in the memory subsystem to satisfy the amount of memory required by the subfunction, wherein the allocated pages do not necessarily result in a contiguous memory region, (c) remapping the allocated pages of step b into a contiguous region of the placeholder created in step a and (d) disabling the remapping after the subfunction is completed to free the memory in the placeholder.

Claims (43)

1. A method of allocating a memory in a memory subsystem of a system-on-a-chip (SOC) for use by a subfunction of the SOC, the method comprising:

creating a placeholder for a plurality of contiguous memory buffers by reserving a region of memory address space, wherein the region of memory address space does not need to be assigned to physical storage;

determining a size of a fixed contiguous memory buffer for each of a plurality of functional units of the SOC prior to the SOC performing any action that uses a memory buffer;

dividing the memory into pages;

allocating at least a portion of the pages based on an amount of memory required by a functional unit of the plurality of functional units when the functional unit of the SOC needs to use a contiguous memory region;

remapping address ranges associated with the pages allocated for the functional unit into a remapped contiguous region of the placeholder; and

configuring the functional unit to reference the remapped contiguous region;

wherein the remapping is performed within the memory subsystem of the SOC.

2. The method according to claim 1 , wherein the remapping is achieved through the use of a lookup table present in the SOC.

3. The method according to claim 2 , wherein the lookup table is a 1024×10 lookup table.

4. The method of claim 1 , wherein a size of the placeholder is at least as large as a combined size of the fixed contiguous memory buffers for each of the plurality of functional units of the SOC.

5. The method of claim 1 , wherein the allocated pages do not result in a contiguous memory region.

6. The method of claim 1 , further comprising disabling the remapping after the functional unit is completed and de-allocating the pages allocated for the completed functional unit.

7. The method of claim 1 , further comprising allocating the pages at run time on an as needed basis for both contiguous memory buffers and noncontiguous memory.

8. The method of claim 1 , wherein determining the size of the fixed contiguous memory buffer for each functional unit of the plurality of functional units is done at compilation time.

9. The method of claim 1 , wherein determining the size of the fixed contiguous memory buffer for each functional unit of the plurality of functional units is done before the functional units are activated.

10. A system-on-a-chip (SOC) device comprising:

a central processing unit (CPU);

a plurality of functional units coupled to the CPU; and

a memory subsystem coupled to the CPU, the memory subsystem including a memory and logic to:

create a placeholder for a contiguous memory buffer by reserving a region of memory address space, wherein the region of memory address space does not need to be assigned to physical storage;

determine a size of a fixed contiguous memory buffer for each functional unit of the plurality of functional units prior to the SOC performing any action that uses a memory buffer, wherein at least one of the fixed contiguous memory buffers is not allocated prior to when a functional unit of the plurality of functional units of the SOC needs to use a contiguous memory region;

divide the memory into pages;

allocate at least a portion of the pages based on an amount of memory required by by the functional unit of the SOC when the functional unit of the SOC needs to use the contiguous memory region;

remap address ranges associated with the pages allocated for the functional unit into a remapped contiguous region; and

configure the functional unit to reference the remapped contiguous region.

11. The SOC device according to claim 10 , comprising a lookup table for use in remapping the allocated pages.

12. The SOC device according to claim 11 , wherein the lookup table is a 1024×10 lookup table.

13. The SOC device of claim 10 , wherein the functional unit is a CPU executable functional unit.

14. The SOC device of claim 10 , wherein the functional unit is a non-CPU executable functional unit.

15. The SOC device of claim 10 , wherein the memory subsystem further comprises logic to de-allocate the pages for the functional unit after the functional unit is completed.

16. The SOC device of claim 10 , wherein the memory subsystem further comprises logic to determine a size of the fixed contiguous memory buffer for each functional unit of the plurality of functional units based on multiple system-level parameters.

17. The SOC device of claim 10 , wherein the memory subsystem further includes logic to remap address ranges for a subset of an input address space of the memory subsystem.

18. The SOC device of claim 17 , wherein the memory subsystem further includes a lookup table to remap input addresses that are within the subset of the input address space.

19. A system-on-a-chip (SOC) device comprising:

a central processing unit (CPU);

a functional unit coupled to the CPU; and

a memory subsystem coupled to the CPU, the memory subsystem including a memory and logic to:

create a placeholder for a contiguous memory buffer by reserving a region of memory address space, wherein the region of memory address space does not need to be assigned to physical storage;

determine a size of a fixed contiguous memory buffer for use by the functional unit of the SOC, wherein at least a portion of the fixed contiguous memory buffer is not allocated prior to a memory request of the functional unit of the SOC;

divide the memory into pages;

receive an input address corresponding to the memory request of the functional unit of the SOC, the input address associated with at least one page allocated for the functional unit; and

selectively remap the input address into a remapped input address of a remapped contiguous region of the placeholder.

Assignments (14)
SECURITY INTEREST Recorded Sep 27, 2017
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 044037/0896 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 7, 2017
From: CONEXANT SYSTEMS, LLC
To: SYNAPTICS INCORPORATED
Reel/Frame 043786/0267 →
CHANGE OF NAME Recorded Jun 26, 2017
From: CONEXANT SYSTEMS, INC.
To: CONEXANT SYSTEMS, LLC
Reel/Frame 042986/0613 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2016
From: LAKESTAR SEMI INC.
To: CONEXANT SYSTEMS, INC.
Reel/Frame 038803/0693 →
CHANGE OF NAME Recorded May 20, 2016
From: CONEXANT SYSTEMS, INC.
To: LAKESTAR SEMI INC.
Reel/Frame 038777/0885 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
To: CONEXANT SYSTEMS, INC.; CONEXANT, INC.; CONEXANT SYSTEMS WORLDWIDE, INC.; BROOKTREE BROADBAND HOLDING, INC.
Reel/Frame 038631/0452 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, INC.
Reel/Frame 037354/0734 →
SECURITY AGREEMENT Recorded Mar 11, 2010
From: CONEXANT SYSTEMS, INC.; CONEXANT SYSTEMS WORLDWIDE, INC.; CONEXANT, INC.; BROOKTREE BROADBAND HOLDING, INC.
To: THE BANK OF NEW YORK, MELLON TRUST COMPANY, N.A.
Reel/Frame 024066/0075 →
RELEASE OF SECURITY INTEREST Recorded Mar 8, 2010
From: CITIBANK, N.A.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 024046/0609 →
CORRECTIVE ASSIGNMENT TO CORRECT THE STREET ADDRESS PREVIOUSLY RECORDED ON REEL 021473 FRAME 0840. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Nov 5, 2008
From: SIGMATEL, INC.
To: CONEXANT SYSTEMS, INC.
Reel/Frame 021788/0449 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2008
From: SIGMATEL, INC.
To: CONEXANT SYSTEMS, INC.
Reel/Frame 021473/0840 →
SECURITY AGREEMENT Recorded Jul 9, 2008
From: SIGMATEL, INC.
To: CITIBANK, N.A.
Reel/Frame 021212/0372 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2006
From: OASIS SEMICONDUCTOR, INC.
To: SIGMATEL, INC.
Reel/Frame 018682/0773 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2005
From: WALTON, DEREK T.; MIKKELSEN, CARL M.
To: OASIS SEMICONDUCTOR, INC.
Reel/Frame 016715/0896 →