Storage elements using nanotube switching elements
Data storage circuits and components of such circuits constructed using nanotube switching elements. The storage circuits may be stand-alone devices or cells incorporated into other devices or circuits. The data storage circuits include or can be used in latches, master-slave flip-flops, digital logic circuits, memory devices and other circuits. In one aspect of the invention, a master-slave flip-flop is constructed using one or more nanotube switching element-based storage devices. The master storage element or the slave storage element or both may be constructed using nanotube switching elements, for example, using two nanotube switching element-based inverters. The storage elements may be volatile or non-volatile. An equilibration device is provided for protecting the stored data from fluctuations on the inputs. Input buffers and output buffers for data storage circuits of the invention may also be constructed using nanotube switching elements.
1. A master-slave flip-flop circuit, comprising:
a data input;
a first clock input and a second clock input for providing non-overlapping first and second clock signals;
a first input buffer coupled to the data input and the first clock input for gating the data input under the control of the first clock input;
a master storage element coupled to the input buffer for storing a first data value representative of the data input, wherein the master storage element is constructed of at least one nanotube switching element;
a second input buffer coupled to the master storage element and the second clock input for gating the first data value under the control of the second clock input;
a slave storage element coupled to the second input buffer for storing a second data value representative of the first data value, wherein the slave storage element is constructed of at least one nanotube switching element; and
a data output coupled to the slave storage element.
2. The circuit of claim 1 , wherein the data input, the first data value, the second data value and the data output are differential.
3. The circuit of claim 1 , wherein the master storage element and the slave storage element are non-volatile.
4. The circuit of claim 1 , wherein the master storage element and the slave storage element are constructed using non-volatile four-terminal nanotube switching elements.
5. The circuit of claim 1 , wherein the master storage element and the slave storage element are volatile.
6. The circuit of claim 5 , wherein the master storage element and the slave storage element are constructed using volatile three-terminal nanotube switching elements.
7. The circuit of claim 1 , wherein at least one of the master storage element or the slave storage element is constructed using a first nanotube switching element-based inverter and a second nanotube switching element-based inverter.
8. The circuit of claim 7 , wherein the first nanotube switching element-based inverter and the second nanotube-switching element based inverter are cross-coupled.
9. The circuit of claim 1 , wherein at least one of the first input buffer or the second input buffer includes a nanotube switching element.
10. The circuit of claim 9 , wherein at least one of the first input buffer or the second input buffer is provided by a nanotube switch-based tri-stating inverter.
11. The circuit of claim 9 , wherein at least one of the first input buffer or the second input buffer is provided by a single nanotube switching element.
12. The circuit of claim 1 , further comprising an output driver circuit coupled between the slave storage element and the output, wherein the output driver circuit is constructed using nanotube switching elements.